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公开(公告)号:EP2050223A1
公开(公告)日:2009-04-22
申请号:EP07799708.8
申请日:2007-07-19
申请人: Intel Corporation
CPC分类号: H04L12/4013 , H04L43/00 , H04L47/14 , H04L47/17 , H04L47/263
摘要: A method that includes streaming video content at a given bit-rate from a computing platform through a wireless access point and to a digital media adaptor that decodes the video content for display. A communication channel used to stream the video content to the digital media adaptor is monitored and information associated with the communication channel as at least a portion of the video content is streamed from the computing platform to the digital media adaptor is collected. Available bandwidth for the communication channel is determined based on the collected information. An adjustment to the given bit-rate that another portion of the video content is streamed from the computing platform is made based on the available bandwidth.
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公开(公告)号:EP4217823A1
公开(公告)日:2023-08-02
申请号:EP21873565.2
申请日:2021-09-24
申请人: INTEL Corporation
发明人: GARG, Vivek , VARMA, Ankush , SISTLA, Krishnakanth , GUPTA, Nikhil , BALIGAR, Nikethan Shivanand , WANG, Stephen , PALIT, Nilanjan , KAM, Timothy , PURANDARE, Adwait , GUPTA, Ujjwal , CHEN, Stanley , SHAPIRA, Dorit , VENUGOPAL, Shruthi , CHEMUDUPATI, Suresh , PARIKH, Rupal , DEHAEMER, Eric , SAMPATH, Pavithra , KANDULA, Phani Kumar , BANSAL, Yogesh , MULLA, Dean , TULANOWSKI, Michael , HAAKE, Stephen , HERDRICH, Andrew , DAS, Ripan
IPC分类号: G06F1/3203 , G06F1/30 , G06F1/26 , G06F9/50
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公开(公告)号:EP2126688A1
公开(公告)日:2009-12-02
申请号:EP07854971.4
申请日:2007-12-05
申请人: Intel Corporation
发明人: FEGHALI, Wajdi , HIRNAK, Stephanie , RAGHUNANDAN, Makaram , BANSAL, Yogesh , YAP, Kirk , WOLRICH, Gilbert, M
CPC分类号: H04L63/0485 , G06F9/30181 , G06F9/3879 , H04L63/08
摘要: In one embodiment, the present disclosure provides a method capable of processing a variety of different operations. A method according to one embodiment may include loading configuration data from a shared memory unit into a hardware configuration register, the hardware configuration register located within circuitry included within a hardware accelerator unit. The method may also include issuing a command set from a microengine to the hardware accelerator unit having the circuitry. The method may additionally include receiving the command set at the circuitry from the microengine, the command set configured to allow for the processing of a variety of different operations. The method may further include processing an appropriate operation based upon the configuration data loaded into the hardware configuration register. Of course, many alternatives, variations and modifications are possible without departing from this embodiment.
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公开(公告)号:EP4172722A1
公开(公告)日:2023-05-03
申请号:EP20941773.2
申请日:2020-06-26
申请人: Intel Corporation
发明人: GUPTA, Ujjwal , VARMA, Ankush , SESHAN, Lakshmipriya , BALIGAR, Nikethan Shivanand , GUPTA, Nikhil , CHOUDHARY, Swadesh , BANSAL, Yogesh
IPC分类号: G06F1/324 , G06F1/3296
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