公开(公告)号：EP2856377B1

公开(公告)日：2017-09-27

申请号：EP12877666.3

申请日：2012-06-01

申请人： Intel Corporation

发明人： GOFFMAN, Sergei ,  BERENZON, Alex ,  LENZ, Oron ,  DEVOR, Tevi ,  ZHANG, Bo ,  ZAHAVI, Yoram ,  MAOR, Moshe

IPC分类号： G06F21/10 ,  G06F9/44 ,  G06F21/53 ,  G06F21/54

CPC分类号： G06F21/602 ,  G06F21/125 ,  G06F21/53 ,  G06F21/54

公开(公告)号：EP2856377A1

公开(公告)日：2015-04-08

申请号：EP12877666.3

申请日：2012-06-01

申请人： Intel Corporation

发明人： GOFFMAN, Sergei ,  BERENZON, Alex ,  LENZ, Oron ,  DEVOR, Tevi ,  ZHANG, Bo ,  ZAHAVI, Yoram ,  MAOR, Moshe

IPC分类号： G06F21/10 ,  G06F9/44

CPC分类号： G06F21/602 ,  G06F21/125 ,  G06F21/53 ,  G06F21/54

摘要： Embodiments of apparatus, computer-implemented methods, systems, devices, and computer-readable media are described herein for identifying and encrypting a subset of a plurality of instructions, for execution in a more secure execution environment, In various embodiments, the subset may include a single entry point and a single exit point. In various embodiments, one or more instructions of the plurality of instructions that precede or follow the subset may be executed in a first execution environment with a first security level. In various embodiments, the subset may be executed in a second execution environment with a second security level that is more secure than the first security level.

公开(公告)号：EP2726991A1

公开(公告)日：2014-05-07

申请号：EP11868426.5

申请日：2011-06-29

申请人： Intel Corporation

发明人： GUERON, Shay ,  SAVAGAONKAR, Uday ,  MCKEEN, Francis X. ,  ROZAS, Carlos V. ,  DURHAM, David M. ,  DOWECK, Jacob ,  MULLA, Ofir ,  ANATI, Ittai ,  GREENFIELD, Zvika ,  MAOR, Moshe

IPC分类号： G06F12/14

CPC分类号： G06F21/72 ,  G06F12/1408 ,  G06F21/00 ,  G06F21/64 ,  H04L9/0637 ,  H04L9/3242

摘要： A method and apparatus to provide cryptographic integrity checks and replay protection to protect against hardware attacks on system memory is provided. A mode of operation for block ciphers enhances the standard XTS-AES mode of operation to perform memory encryption by extending a tweak to include a "time stamp" indicator. A tree-based replay protection scheme uses standard XTS-AES to encrypt contents of a cache line in the system memory. A Message-Authentication Code (MAC) for the cache line is encrypted using enhanced XTS-AES and a "time stamp" indicator associated with the cache line. The "time stamp indicator" is stored in a processor.

公开(公告)号：EP2726991B1

公开(公告)日：2018-03-14

申请号：EP11868426.5

申请日：2011-06-29

申请人： Intel Corporation

发明人： GUERON, Shay ,  SAVAGAONKAR, Uday ,  MCKEEN, Francis X. ,  ROZAS, Carlos V. ,  DURHAM, David M. ,  DOWECK, Jacob ,  MULLA, Ofir ,  ANATI, Ittai ,  GREENFIELD, Zvika ,  MAOR, Moshe

IPC分类号： G06F12/14 ,  G06F21/72 ,  G06F21/64 ,  H04L9/06 ,  H04L9/32

CPC分类号： G06F21/72 ,  G06F12/1408 ,  G06F21/00 ,  G06F21/64 ,  H04L9/0637 ,  H04L9/3242

摘要： A method and apparatus to provide cryptographic integrity checks and replay protection to protect against hardware attacks on system memory is provided. A mode of operation for block ciphers enhances the standard XTS-AES mode of operation to perform memory encryption by extending a tweak to include a “time stamp” indicator. A tree-based replay protection scheme uses standard XTS-AES to encrypt contents of a cache line in the system memory. A Message-Authentication Code (MAC) for the cache line is encrypted using enhanced XTS-AES and a “time stamp” indicator associated with the cache line. The “time stamp indicator” is stored in a processor.

公开(公告)号：EP2619705A2

公开(公告)日：2013-07-31

申请号：EP11827696.3

申请日：2011-09-24

申请人： Intel Corporation

发明人： GUERON, Shay ,  GERZON, Gideon ,  ANATI, Ittai ,  DOWECK, Jacob ,  MAOR, Moshe

IPC分类号： G06F21/20 ,  G06F12/14

CPC分类号： G06F12/1408 ,  G06F21/52 ,  G06F21/64

摘要： A method and apparatus for protecting against hardware attacks on system memory is provided. A mode of operation for block ciphers enhances the standard XTS-AES mode of operation to perform memory encryption by extending a tweak to include a "time stamp" indicator. An incrementing mechanism using the "time stamp" indicator generates a tweak which separates different contexts over different times such that the effect of "Type 2 replay attacks" is mitigated.

摘要翻译： 提供了一种用于防止对系统存储器的硬件​​攻击的方法和装置。 用于块密码的操作模式增强了标准的XTS-AES操作模式，通过扩展调整以包括“时间戳”指示符来执行存储器加密。 使用“时间戳”指示符的递增机制产生了在不同时间分离不同上下文的调整，使得“类型2重放攻击”的效果得到缓解。

公开(公告)号：EP1964020A1

公开(公告)日：2008-09-03

申请号：EP06845166.5

申请日：2006-12-06

申请人： Intel Corporation

发明人： NEMIROFF, Daniel ,  HERBERT, Howard, C. ,  DIAMANT, Nimrod ,  MAOR, Moshe ,  SMITH, Carey, W. ,  HUFFMAN, Amber ,  CORRADO, Fran ,  ROTHMAN, Michael, A. ,  ZIMMER, Vincent, J.

IPC分类号： G06F21/02

CPC分类号： G06F21/805

摘要： A computer system is disclosed. The computer system includes a storage device/ a device controller and a chipset. The device controller includes lock registers having values that correspond to the ranges of locked sectors of the storage device. The lock registers verify if a storage device access request is targeted for ranges of sectors of the storage device that are locked. The chipset includes an embedded controller to authenticate the storage device access request and to manage configuration of the storage device.

公开(公告)号：EP1839139B1

公开(公告)日：2014-10-08

申请号：EP05854741.5

申请日：2005-12-20

申请人： Intel Corporation

发明人： HERBERT, Howard ,  MAOR, Moshe

IPC分类号： G06F9/445

CPC分类号： G06F9/4416 ,  G06F8/61

公开(公告)号：EP1839139A1

公开(公告)日：2007-10-03

申请号：EP05854741.5

申请日：2005-12-20

申请人： Intel Corporation

发明人： HERBERT, Howard ,  MAOR, Moshe

IPC分类号： G06F9/445

CPC分类号： G06F9/4416 ,  G06F8/61

摘要： In one embodiment, a networked device includes a main platform having a processor, a memory and a basic input/output system (BIOS), and a management subsystem coupled to the main platform to provision the main platform irrespective of the presence of an operating system on the main platform.

公开(公告)号：EP1828950A2

公开(公告)日：2007-09-05

申请号：EP05855179.7

申请日：2005-12-15

申请人： Intel Corporation

发明人： MAOR, Moshe

IPC分类号： G06F21/02 ,  G06F21/00 ,  G06F21/04 ,  H04L29/06

CPC分类号： H04L41/0813 ,  G06F21/57 ,  G06F21/74 ,  G06F21/82 ,  G06F21/85 ,  G06F2221/2101 ,  G06F2221/2105

摘要： Techniques to limit accesses to hardware component devices by external devices or external software programs. A filter device may be used to filter requests to access core logic of a hardware component device based on access rules. Access rules can limit access to the core logic based on phases of the hardware component device, the requested operation of the core logic, or the target area in the core logic.

公开(公告)号：EP1828949A2

公开(公告)日：2007-09-05

申请号：EP05854577.3

申请日：2005-12-15

申请人： Intel Corporation

发明人： MAOR, Moshe

IPC分类号： G06F21/02

CPC分类号： G06F21/74 ,  G06F21/57 ,  G06F21/82 ,  G06F21/84 ,  G06F2221/2101 ,  G06F2221/2105

摘要： Techniques to limit the control of component hardware devices in a computer system by external devices or external software programs.