公开(公告)号：EP0609626A2

公开(公告)日：1994-08-10

申请号：EP93310452.3

申请日：1993-12-23

申请人： International Business Machines Corporation

发明人： Salcedo, Louis ,  Cazzolla, John Joseph ,  Crouse, Richard Stephen ,  Chang, Luke Lung ,  Hurtado, Marco Montalvo ,  Nguyen, Kha Dinh ,  Rivero, Jose Luis ,  Ruiz, Jose Joaquin

IPC分类号： H04L12/50 ,  H04Q3/00 ,  H04Q11/04

CPC分类号： H04L49/351 ,  H04L49/101 ,  H04L49/3018 ,  H04L49/3027 ,  H04L2012/445

摘要： A serial simplex switch 14 design is provided which includes I/O ports 20 each of which is configurable specifically for attachment to a data communications subsystem 12 or, alternatively, for cascaded connection to a similarly configured I/O port 20 on another switch 14. The switch 14 provides a packet routing function including input 32 and output 36 buffers for each of its I/O ports 20 wherein packets of control messages sent by one subsystem 20 are temporarily stored prior to being delivered to the appropriate destination subsystem 20. When configured to be directly attached to a subsystem 20, the I/O ports 20 separate control messages from incoming integrated data and control message strings. In a cascade configuration, however, a mechanism is provided wherein data and control messages are separated into two physical paths to eliminate the delays associated with integrated data and control message flow through the cascaded I/O port 20. Each I/O port 20 is configurable to either of these methods of operation by means of programmable latches associated with the I/O port 20.

摘要翻译： 级联单工交换机具有简单的串行交叉开关，其包括几个I / O端口，每个I / O端口适于连接到通信子系统，该通信子系统将数据和控制消息传递到其他通信子系统或者在其上的几个第二I / O端口之一 第二单纯串联交叉开关。 每个第一个I / O端口都有可编程锁存器，用于对其进行编程。 如果端口连接到通信子系统，则单个第一端口连接到单个子系统，并且管理发送到子系统和从子系统发送的数据和控制消息。 如果级联，则该对第一I / O端口之一管理数据传输，另一对管理消息的传送。

公开(公告)号：EP0609626A3

公开(公告)日：1995-04-05

申请号：EP93310452.3

申请日：1993-12-23

申请人： International Business Machines Corporation

发明人： Salcedo, Louis ,  Cazzolla, John Joseph ,  Crouse, Richard Stephen ,  Chang, Luke Lung ,  Hurtado, Marco Montalvo ,  Nguyen, Kha Dinh ,  Rivero, Jose Luis ,  Ruiz, Jose Joaquin

IPC分类号： H04L12/50 ,  H04Q3/00 ,  H04Q11/04

CPC分类号： H04L49/351 ,  H04L49/101 ,  H04L49/3018 ,  H04L49/3027 ,  H04L2012/445

摘要： A serial simplex switch 14 design is provided which includes I/O ports 20 each of which is configurable specifically for attachment to a data communications subsystem 12 or, alternatively, for cascaded connection to a similarly configured I/O port 20 on another switch 14. The switch 14 provides a packet routing function including input 32 and output 36 buffers for each of its I/O ports 20 wherein packets of control messages sent by one subsystem 20 are temporarily stored prior to being delivered to the appropriate destination subsystem 20. When configured to be directly attached to a subsystem 20, the I/O ports 20 separate control messages from incoming integrated data and control message strings. In a cascade configuration, however, a mechanism is provided wherein data and control messages are separated into two physical paths to eliminate the delays associated with integrated data and control message flow through the cascaded I/O port 20. Each I/O port 20 is configurable to either of these methods of operation by means of programmable latches associated with the I/O port 20.