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    TESTING OF AN INTEGRATED CIRCUIT THAT CONTAINS SECRET INFORMATION
    1.
    发明授权
    TESTING OF AN INTEGRATED CIRCUIT THAT CONTAINS SECRET INFORMATION 有权
    检查一个集成电路，其秘密信息包含

    公开(公告)号：EP1915632B1

    公开(公告)日：2009-04-01

    申请号：EP06780333.8

    申请日：2006-08-09

    申请人： NXP B.V.

    发明人： MARINISSEN, Erik J. ,  GOEL, Sandeepkumar ,  NIEUWLAND, Andre K. ,  VERMEULEN, Hubertus G. H. ,  VRANKEN, Hendrikus P. E.

    IPC分类号： G01R31/317 ,  G01R31/3185

    CPC分类号： G01R31/31719 ,  G01R31/318533

    摘要： An integrated circuit (10) comprises a functional circuit (12a-c) that contain information that must be secured against unauthorized access. The integrated circuit comprises a test access circuit (14, 16) coupled to the functional circuit (12a-c), and a plurality of fuse elements (18) coupled to the test access circuit (14, 16). The fuse elements (18) are connected in a circuit configuration that makes the functional circuit (12a-c) consistently accessible via the test access circuit (14, 16) only when first fuse elements (18) of the plurality are in a blown state and second fuse elements (18) of the plurality are in a not-blown state. As a result the integrated circuit can be tested after selectively blowing all of the first fuse elements (18). After testing at least part of the second fuse elements (18) is blown. As a result, a person that does not know which fuse elements are first fuse elements and which are second fuse elements is presented with difficulties to restore the integrated circuit to a state where test access with the danger of access to the secured information is possible.

    TESTABLE INTEGRATED CIRCUIT AND IC TEST METHOD
    3.
    发明公开
    TESTABLE INTEGRATED CIRCUIT AND IC TEST METHOD 审中-公开
    可验证的集成电路和IC测试程序

    公开(公告)号：EP1977262A2

    公开(公告)日：2008-10-08

    申请号：EP07700547.8

    申请日：2007-01-05

    申请人： NXP B.V.

    发明人： GOEL, Sandeepkumar ,  PINEDA DE GYVEZ, Jose de Jesus ,  MEIJER, Rinze I., M., P.

    IPC分类号： G01R31/317 ,  G01R31/3185

    CPC分类号： G01R31/31715 ,  G01R31/31723 ,  G01R31/318569 ,  G01R31/318572

    摘要： An integrated circuit (200) comprises a functional block (130) conductively coupled to a supply rail (110) via one or more switches (115). The IC further comprises selection means (220) responsive to a test enable signal for activating the one or more switches (115) in a test mode of the IC and evaluation means such as a comparator (230) having a first input coupled to a reference signal source (215) and having a second input coupled to a node (225) between the one or more switches (115) and the functional block (130) for evaluating the behaviour of the one or more switches (115) based on the reference signal and a signal from the node (225). Thus, the present invention provides a design for testability solution for testing power switches.

    TESTING OF AN INTEGRATED CIRCUIT THAT CONTAINS SECRET INFORMATION
    4.
    发明公开
    TESTING OF AN INTEGRATED CIRCUIT THAT CONTAINS SECRET INFORMATION 有权
    包含秘密信息的集成电路的测试

    公开(公告)号：EP1917535A2

    公开(公告)日：2008-05-07

    申请号：EP06795621.9

    申请日：2006-08-09

    申请人： NXP B.V.

    发明人： NIEUWLAND, Andre, K. ,  GOEL, Sandeepkumar ,  MARINISSEN, Erik, J. ,  VERMEULEN, Hubertus, G., H. ,  VRANKEN, Hendrikus, P., E.

    IPC分类号： G01R31/317

    CPC分类号： G01R31/318541 ,  G01R31/31719

    摘要： An integrated circuit (10) comprises a scan chain (14) with parallel inputs and outputs coupled to a functional circuit (12a-c). A scan chain modifying circuit (43, 47, 70a-c) is provided coupled to the scan chain (14). When testing is authorized the scan chain modifying circuit operates in a mode wherein a normal shift path is provided through the scan chain. When testing is not authorized the scan chain modifying circuit (43, 47, 70a-c) operates to effect spontaneous dynamic changes in the shift path, which dynamically vary the length of the shift path between external terminals of the integrated circuit while shifting takes place. In an embodiment the dynamical variations are controlled by a running key comparison. In other embodiments running key comparison is used to disable transfer through the scan chain and/or operation of functional circuits.

    摘要翻译： 集成电路（10）包括具有耦合到功能电路（12a-c）的并行输入和输出的扫描链（14）。 扫描链修改电路（43,47,70a-c）被提供为耦合到扫描链（14）。 当测试被授权时，扫描链修改电路以其中通过扫描链提供正常移位路径的模式操作。 当测试未被授权时，扫描链修改电路（43,47,70a-c）操作以实现移位路径中的自发动态变化，其在移位发生时动态地改变集成电路的外部端子之间的移位路径的长度 。 在一个实施例中，动态变化由运行键比较来控制。 在其他实施例中，运行密钥比较被用于禁止通过扫描链的传输和/或功能电路的操作。

    TESTING OF AN INTEGRATED CIRCUIT THAT CONTAINS SECRET INFORMATION
    5.
    发明公开
    TESTING OF AN INTEGRATED CIRCUIT THAT CONTAINS SECRET INFORMATION 有权
    检查一个集成电路，其秘密信息包含

    公开(公告)号：EP1915632A1

    公开(公告)日：2008-04-30

    申请号：EP06780333.8

    申请日：2006-08-09

    申请人： NXP B.V.

    发明人： MARINISSEN, Erik J. ,  GOEL, Sandeepkumar ,  NIEUWLAND, Andre K. ,  VERMEULEN, Hubertus G. H. ,  VRANKEN, Hendrikus P. E.

    IPC分类号： G01R31/317 ,  G01R31/3185

    CPC分类号： G01R31/31719 ,  G01R31/318533

    摘要： An integrated circuit (10) comprises a functional circuit (12a-c) that contain information that must be secured against unauthorized access. The integrated circuit comprises a test access circuit (14, 16) coupled to the functional circuit (12a-c), and a plurality of fuse elements (18) coupled to the test access circuit (14, 16). The fuse elements (18) are connected in a circuit configuration that makes the functional circuit (12a-c) consistently accessible via the test access circuit (14, 16) only when first fuse elements (18) of the plurality are in a blown state and second fuse elements (18) of the plurality are in a not-blown state. As a result the integrated circuit can be tested after selectively blowing all of the first fuse elements (18). After testing at least part of the second fuse elements (18) is blown. As a result, a person that does not know which fuse elements are first fuse elements and which are second fuse elements is presented with difficulties to restore the integrated circuit to a state where test access with the danger of access to the secured information is possible.