公开(公告)号：EP1968198B1

公开(公告)日：2013-05-08

申请号：EP08003981.1

申请日：2008-03-04

申请人： Sony Corporation

发明人： Noda, Makoto

IPC分类号： H03M5/14 ,  G11B20/14

CPC分类号： G11B20/1426 ,  G11B2020/1446 ,  G11B2020/1449 ,  G11B2020/1473 ,  H03M5/145

公开(公告)号：EP2153526A1

公开(公告)日：2010-02-17

申请号：EP08736438.6

申请日：2008-04-21

申请人： International Business Machines Corporation

发明人： CIDECIYAN, Roy, Daron ,  ELEFTHERIOU, Evangelos ,  MITTELHOLZER, Thomas ,  SEGER, Paul ,  TANAKA, Keisuke

IPC分类号： H03M5/14 ,  G11B20/14

CPC分类号： H03M5/145 ,  G11B20/1426 ,  G11B2020/1446 ,  G11B2020/1473 ,  G11B2220/90 ,  G11B2220/956

摘要： An unencoded m-bit data input sequence is divided into a block of n bits and a block of m-n bits. The block of n bits is divided into a first set of n+1 encoded bits, wherein at least one of P1subblocks of the first set satisfies a G, M and I constraints. The first set of n+1 encoded bits is mapped into a second set of n+1 encoded bits wherein at least one of P2 subblocks of the second set gives rise to at least Q1 transitions after 1/(1+D2) precoding. A second set of n+1 encoded bits is divided into P3 encoded subblocks and the P3 encoded subblocks are interleaved among (m-n)/s unencoded symbols so as to form a (m+1)-bit output sequence codeword which is then stored on a data storage medium.

摘要翻译： 一个未编码的m位数据输入序列被分成一个n位块和一个m-n位块。 n比特的块被分成第一组n + 1个编码比特，其中第一组的P1subblock中的至少一个满足G，M和I约束。 第一组n + 1编码比特被映射到第二组n + 1编码比特，其中第二组的至少一个P2子块在1 /（1 + D2）预编码之后引起至少Q1转变。 第二组n + 1个编码比特被分成P3个编码子块并且P3个编码子块在（mn）/ s个未编码符号之间交织以形成（m + 1）比特输出序列码字，然后将其存储在 数据存储介质。

公开(公告)号：EP0823708A3

公开(公告)日：1999-07-28

申请号：EP97305624.5

申请日：1997-07-25

申请人： CIRRUS LOGIC, INC.

发明人： Zook, Christopher P.

IPC分类号： G11B20/14 ,  G11B20/10

CPC分类号： G11B20/10055 ,  G11B20/10009 ,  G11B20/10037 ,  G11B20/1403 ,  G11B20/1426 ,  G11B2020/1446

摘要： A partial response class-IV (PR4) read channel is disclosed for magnetic recording including a coding scheme which improves timing recovery by providing a more accurate phase error estimate. The conventional 1/(1+D 2 ) precoder is not used in the present invention (to avoid the ambiguous initial state), so that the read channel can directly control the flux transitions written onto the magnetic disc. This enables the read channel to encode user data according to a criteria that creates well defined slopes in the analog read signal at the sample instances, thereby improving the accuracy of the timing recovery phase error estimate.

公开(公告)号：EP2153526B1

公开(公告)日：2013-03-20

申请号：EP08736438.6

申请日：2008-04-21

申请人： International Business Machines Corporation

发明人： CIDECIYAN, Roy, Daron ,  ELEFTHERIOU, Evangelos ,  MITTELHOLZER, Thomas ,  SEGER, Paul ,  TANAKA, Keisuke

IPC分类号： H03M5/14 ,  G11B20/14

CPC分类号： H03M5/145 ,  G11B20/1426 ,  G11B2020/1446 ,  G11B2020/1473 ,  G11B2220/90 ,  G11B2220/956

公开(公告)号：EP1137006A3

公开(公告)日：2003-12-17

申请号：EP01302686.9

申请日：2001-03-22

申请人： SONY CORPORATION

发明人： Hattori, Masayuki ,  Murayama, Jun ,  Miyauchi, Toshiyuki

IPC分类号： G11B20/18 ,  G11B20/14 ,  H03M5/14 ,  H03M13/27 ,  H03M13/29 ,  G11B20/10

CPC分类号： H03M13/2957 ,  G11B20/10194 ,  G11B20/1426 ,  G11B20/1833 ,  G11B20/1866 ,  G11B2020/1434 ,  G11B2020/1446 ,  H03M13/6325

摘要： A magnetic recording and/or reproducing apparatus achieves high performance encoding and high efficiency decoding to lower the decoding error rate. A magnetic recording and/or reproducing apparatus (50) includes, in its recording system, an error correction coder (51) for error correction coding input data and an interleaver (52) for scrambling the sequence of data supplied from the error correction coder (51). The magnetic recording and/or reproducing apparatus (50) also includes, in its reproducing system, A modulation and error correction turbo decoder (64). The decoder (64) has a deinterleaver for scrambling and re-arraying the sequence of the input data such as to restore the sequence of input data re-arrayed by the interleaver (52) to an original bit sequence, an error correction soft decoder (84) for decoding data supplied from the deinterleaver and a second interleaver (86) for scrambling and re-arraying the sequence of data given as a difference between data output from the error correction soft decoder and data output from the deinterleaver.

公开(公告)号：EP1143440A2

公开(公告)日：2001-10-10

申请号：EP01302599.4

申请日：2001-03-21

申请人： SONY CORPORATION

发明人： Hattori, Masayuki ,  Murayama, Jun ,  Miyauchi, Toshiyuki

IPC分类号： G11B20/10 ,  G11B20/14 ,  H03M13/45 ,  H03M5/14

CPC分类号： H03M13/6325 ,  G11B20/10009 ,  G11B20/1426 ,  G11B20/1866 ,  G11B2020/1434 ,  G11B2020/1446 ,  H03M5/14 ,  H03M13/27 ,  H03M13/2957 ,  H03M13/2972 ,  H03M13/45 ,  H03M13/6343

摘要： A method and apparatus for recording or reproducing data in which high performance encoding and a high efficiency decoding are realized to lower the decoding error rate. A magnetic recording and/or reproducing apparatus 50 includes, in a recording system, a modulation encoder 52 for modulation encoding input data in a predetermined fashion and an interleaver 53 for interleaving data supplied from the modulation encoder 52 to re-array the data sequence. The magnetic recording and/or reproducing apparatus 50 also includes, in a reproducing system, a first deinterleaver for interleaving the input data for re-arraying the data sequence so that the bit sequence of data re-arrayed by the interleaver 53 will be restored to its original bit sequence, a modulation soft input soft output (SISO) decoder for modulation decoding data supplied from the first deinterleaver and a second deinterleaver for interleaving data corresponding to a difference value between data output by the modulation SISO decoder and data output by the first deinterleaver to re-array the data sequence of the difference data.

摘要翻译： 一种用于记录或再现其中的高性能编码和高效率解码数据的方法和装置实现，以降低解码误差率。 一种磁记录和/或再现装置50包括，在记录系统中，以预定的方式调制编码输入数据的调制编码器52和交织器53交织来自调制编码器52提供来重新排列数据序列的数据。 磁记录和/或再现装置50因此包括，在重放系统中，用于重新排列数据序列进行交织的输入数据的第一解交织器所以没有数据由交织器53重新排列的比特序列将被恢复到 其原始的比特序列，将调制软输入软输出（SISO）解码器，用于从所述第一解交织器和用于通过所述第一交织数据由调制SISO解码器和数据输出对应于数据输出之间的差值的第二解交织器提供调制的数据进行解码 解交织器重新排列差分数据的数据序列。

公开(公告)号：EP0915571A3

公开(公告)日：1999-07-28

申请号：EP98300798.0

申请日：1998-02-04

申请人： Samsung Electronics Co., Ltd.

发明人： Kim, Jin-sook

IPC分类号： H03M5/14 ,  G11B20/14 ,  H04L25/49

CPC分类号： H04L25/4908 ,  G11B20/1426 ,  G11B2020/1446 ,  H03M5/145

摘要： In a coding/decoding method for high density data recording and reproduction a 16/17 RLL(0,6/6) coding/decoding method is improved by adopting an encoder/decoder (3,8) having a simplified structure. The invention also provides an optimal lookup table between input and output, for encoding/decoding the rate 16/17 RLL(0,6/6) block code, and a simplified relational equation between input and output.

摘要翻译： 在用于高密度数据记录和再现的编码/解码方法中，通过采用具有简化结构的编码器/解码器（3,8）来改进16/17 RLL（0,6 / 6）编码/解码方法。 本发明还提供了输入和输出之间的最佳查找表，用于编码/解码速率16/17 RLL（0,6 / 6）块码，以及输入和输出之间的简化关系方程式。

公开(公告)号：EP0751522A2

公开(公告)日：1997-01-02

申请号：EP96304378.1

申请日：1996-06-12

申请人： QUANTUM CORPORATION

发明人： Fitzpatrick, James ,  Fitzpatrick, Kelly K.

IPC分类号： G11B20/14

CPC分类号： H03M13/31 ,  G11B20/1426 ,  G11B20/1833 ,  G11B2020/1434 ,  G11B2020/1446 ,  H03M5/145 ,  H03M13/00

摘要： A method for encoding a sequence of 16 bit digital data words into a sequence of 17 bit codewords in consonance with predetermined minimum zero run length (d), predetermined maximum zero run length (G) and maximum interleave zero run length (I) coding constraints of (d=0, G=6/I=7) for recording upon a magnetic medium within a magnetic recording channel is disclosed. The method includes dividing the 16 bit data word into an 8-bit A byte: a1, a2, a3, a4, a5, a6, a7, a8; and an 8-bit B byte b1, b2, b3, b4, b5, b6, b7, b8; separately testing the A and B bytes for violation of coding constraints, generating P and Q code bytes from the A and B bytes and inserting a center bit C of value one or zero between the P and Q code bytes to form the 17 bit codeword of a form p1, p2, p3, p4, p5, p6, p7, p8, C, q8, q7, q6, q5, q4, q3, q2, q1 in a manner minimizing hardware logic implementation.

摘要翻译： 一种根据预定的最小零游程长度（d），预定的最大零游程长度（G）和最大交错零游程长度（I）编码约束，将16位数字数据字序列编码成17位码字序列的方法 （d = 0，G = 6 / I = 7），用于在磁记录通道内的磁介质上进行记录。 该方法包括将16位数据字分成8位A字节：a1，a2，a3，a4，a5，a6，a7，a8; 和8位B字节b1，b2，b3，b4，b5，b6，b7，b8; 单独测试A和B字节违反编码约束，从A和B字节生成P和Q码字节，并在P和Q码字节之间插入值为1或0的中心位C，形成17位码字 以最小化硬件逻辑实现的方式，形成p1，p2，p3，p4，p5，p6，p7，p8，c，q8，q7，q6，q5，q4，q3，q2，q1。

公开(公告)号：EP1543516A1

公开(公告)日：2005-06-22

申请号：EP03798181.8

申请日：2003-09-24

申请人： Infineon Technologies AG

发明人： BLISS, William, G. ,  KARABED, Razmik ,  VITYAEV, Andrei

IPC分类号： G11B20/10 ,  G11B20/14

CPC分类号： G11B20/1426 ,  G11B20/10009 ,  G11B20/1833 ,  G11B2020/1446 ,  H03M5/145 ,  H03M13/093

摘要： An apparatus has a conversion circuit, a precoder circuit, and a selection circuit. The conversion circuit converts user data b1, b2, b3 . . . bk to a coded sequence c0, c1, c2 . . . cq. The selection circuit selects c0 in the coded sequence c0, c1, c2 . . . cq such that the output of the precoder circuit has less than a maximum number q of transitions. The conversion circuit may include an encoder circuit to convert user data b1, b2, b3 . . . bk to a sequence c1, c2 . . . cq, and a transition minimization circuit to add c0 to the sequence c1, c2 . . . cq. The apparatus may have a circuit to add at least one additional bit, which may be a parity bit, to the coded sequence c0, c1, c2 . . . cq.

公开(公告)号：EP0846374B1

公开(公告)日：2001-03-28

申请号：EP96928830.7

申请日：1996-08-08

申请人： QUANTUM CORPORATION

发明人： FISHER, Kevin, D. ,  ZIPEROVICH, Pablo, A.

IPC分类号： H03M7/00 ,  H03M9/00 ,  H03M13/00 ,  G11B5/09 ,  G11B20/14 ,  G11B20/16

CPC分类号： G11B20/1866 ,  G11B20/10009 ,  G11B20/1426 ,  G11B2020/1434 ,  G11B2020/1446 ,  H03M13/27

摘要： A modulation method generates a rate 16/17 (d = 0, G = 7/I = 11) modulation code for transferring user digital data bytes having a three-way ECC interleave through a data transfer channel in accordance with the steps of: shuffling (112, 114) the user data bytes in order to rearrange an order of the bytes in a predetermined manner and putting out AiBi byte pairs, encoding (116) eight bits of the Ai bytes of the AiBi byte pairs in accordance with a predetermined rate 8/9 modulation code to produce nine code bits a0-a8, and interleaving (130) the nine code bits a0-a8 of each Ai byte with eight unencoded bits of each Bi byte in accordance with a predetermined bitwise interleave pattern to generate the rate 16/17 modulation code. A preferred code and circuitry for the modulation method are also described.