SIGNAL PROCESSING SYSTEM, METHOD AND DEVICE
    6.
    发明公开

    公开(公告)号:EP3373536A1

    公开(公告)日:2018-09-12

    申请号:EP15909463.0

    申请日:2015-11-30

    IPC分类号: H04L25/03

    摘要: A signal processing system and method, and an apparatus are provided. A phase recovery apparatus may be used to: receive a feedback signal fed back by an information iteration apparatus, perform, based on the feedback signal, phase recovery on a signal output by an equalizer, and output a phase-recovered signal to a post filtering apparatus, so that the post filtering apparatus performs noise filtering on the phase-recovered signal, and outputs a noise-filtered signal to the information iteration apparatus. To be specific, the phase recovery may be performed, based on the signal fed back by the information iteration apparatus, on the signal output by the equalizer. Because output of the information iteration apparatus is more accurate in determining the signal, precision of the phase recovery can be improved, cycle skipping is reduced, and input signal quality of the post filtering apparatus is improved. Therefore, a problem that performance improvement of an entire system is limited because an existing turbo iteration manner cannot improve or cannot greatly improve input signal quality of a post filter can be resolved, and system performance is improved.

    METHOD AND APPARATUS FOR PARALLEL TURBO DECODING IN LONG TERM EVOLUTION SYSTEM (LTE)
    9.
    发明授权
    METHOD AND APPARATUS FOR PARALLEL TURBO DECODING IN LONG TERM EVOLUTION SYSTEM (LTE) 有权
    用于长期演进系统(LTE)中的并行Turbo解码的方法和设备

    公开(公告)号:EP2429085B1

    公开(公告)日:2018-02-28

    申请号:EP09845992.8

    申请日:2009-06-18

    申请人: ZTE Corporation

    发明人: ZHAO, Xingshan

    IPC分类号: H03M13/29 H03M13/39

    摘要: Provided are a method and an apparatus for parallel Turbo decoding in a long term evolution system (LTE), which can reduce decoding time delays and increase decoding peak data rates. The method comprises the following steps of: storing input check soft bits and a frame to be decoded, and when storing said frame to be decoded, dividing the frame to be decoded into blocks and storing each block respectively as system soft bits; simultaneously performing component decoding once for several blocks of a frame to be decoded, and in the process of said component decoding, dividing each block into several sliding windows according to a sliding window algorithm, and calculating the following parameters according to the system soft bits, the check soft bits and priori information: branch metric value ³, forward state vector ±, backward state vector ², log-likelihood ratio (LLR), and priori information, and storing the priori information for use in a next component decoding; completing a decoding process after performing component decoding several times; performing a hard decision on the LLR, and if it is judged that a result of the hard decision meets an iteration ending condition, outputting a decoding result, otherwise, proceeding with a next process of iteration decoding.