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11.发明公开
公开(公告)号：EP0882303A4
公开(公告)日：2000-12-06
申请号：EP97943456
申请日：1997-09-23
发明人： MORAGHAN PAUL , HUNNINGHAUS ROY E
CPC分类号： H01H47/002 , G01R31/06 , H01F2007/185 , H01H47/32 , H01H2047/008
摘要： A solenoid driver (10) capable of detecting the operational status of a solenoid (12) including the position of an armature within a solenoid coil and an operational method. The solenoid driver (10) generates a first solenoid current within the solenoid (12) and measures a first decay time t1. The first solenoid current is insufficient to pull the armature into the coil of the solenoid (12). A comparator circuit (22) continuously monitors the solenoid current and initiates a timer within a counter circuit (34) to compute the first current decay time. A second solenoid current is generated within the solenoid (12) that is sufficient to pull the armature into the coil of the solenoid (12). The second solenoid current is turned off and a second decay time t2 is measured. The decay times are stored in storage registers (R1, R2) within a controller (36). The controller (36) compares the measured decay times with stored values and outputs the armature position information over a communications bus (34).
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12.发明公开APPARATUS FOR PERFORMING FREQUENCY CONVERSION IN A COMMUNICATION SYSTEM 失效在EINER TELEKOMMUNIKATIONSANORDNUNG的FREQUENZUMSETZER
公开(公告)号：EP0716788A4
公开(公告)日：1996-11-06
申请号：EP95922104
申请日：1995-05-26
发明人： STEWART KENNETH A , LOVE ROBERT T
CPC分类号： H04B1/0021 , H03D3/007 , H03D2200/005 , H03D2200/0056 , H03D2200/006 , H03D2200/0068 , H03D2200/0072 , H03D2200/008 , H04B1/0003 , H04B1/0032 , H04B1/0046 , H04B1/26
摘要： An efficient apparatus for performing frequency conversion from a final IF frequency to a baseband frequency is described. A counter (401) generates two logical signals G1 (402) and G2 (403) which are passed to an exclusive-OR gate (404) and a multiplexer (406). When a control signal (411) is deasserted, multiplexer (406) passes signal G1 to I1 and signal G2 to I2; when control signal (411) is asserted, multiplexer (406) passes binary signal G1 to I2 (410) and signal G2 to I1 (407). Similarly, multiplexer (405) swaps its input real and imaginary samples when the output of exclusive-OR gate (404) is asserted; otherwise, it performs no operation on its input samples. Signals I1 (407) and I2 (410) are used to control arithmetic inverters (408) and (409) respectively. When the controlling signal for either inverter is asserted, the inventer performs arithmetic inversion, otherwise it performs no operation.
摘要翻译： 描述了用于执行从最终IF频率到基带频率的频率转换的有效设备。 计数器（401）产生传送到异或门（404）和多路复用器（406）的两个逻辑信号G1（402）和G2（403）。 当控制信号（411）无效时，多路复用器（406）将信号G1传递给I1并将信号G2传递给I2; 当控制信号（411）被断言时，多路复用器（406）将二进制信号G1传递给I2（410）并将信号G2传递给I1（407）。 类似地，当异或门（404）的输出被声明时，多路复用器（405）交换其输入实数和虚数样本; 否则，它不会对其输入采样执行任何操作。 信号I1（407）和I2（410）分别用于控制算术逆变器（408）和（409）。 当任一个逆变器的控制信号有效时，本发明人执行算术逆变，否则它不执行任何操作。
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公开(公告)号：EP0701750A1
公开(公告)日：1996-03-20
申请号：EP95910170.0
申请日：1995-02-06
摘要： A wide bandwidth frequency discriminator circuit (200) employs a wide bandwidth limiting amplifier (202) to amplify the IF signal portion a received RF signal. A delay circuit (204), such as a micro strip transmission line, provides a delayed representation of the amplified signal to a multiplier circuit (206). The multiplier (206) in turn provides a product signal which is the product of the amplified output signal and the delayed representation of the amplified output signal. As will be appreciated, said product signal will be proportional to the phase difference between the amplified output signal and the delayed representation of the amplified output signal. This discriminator (200) operates to form a detection system capable of discriminating between desired and undesired components of the received RF signal even when said desired and undesired components are nearly identical in amplitude. This is due in part to the enhanced frequency response provided by the discriminator (200).
摘要翻译： 宽带宽鉴频器电路（200）采用宽带宽限制放大器（202）来放大接收到的RF信号的IF信号部分。 诸如微带传输线的延迟电路（204）将放大后的信号的延迟表示提供给乘法器电路（206）。 乘法器（206）又提供乘积信号，该乘积信号是放大输出信号与放大输出信号的延迟表示的乘积。 应该理解，所述乘积信号将与放大输出信号和放大输出信号的延迟表示之间的相位差成比例。 该鉴别器（200）用于形成检测系统，该检测系统即使在所述期望的和不期望的分量幅度几乎相同时也能够区分所接收的RF信号的期望分量和不期望分量。 这部分是由于鉴别器（200）提供的增强的频率响应。
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