利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

13 条记录 (耗时 0.01 秒)

    MULTI-BAND CREST FACTOR REDUCTION
    1.
    发明授权
    MULTI-BAND CREST FACTOR REDUCTION 有权
    多频道因子减少

    公开(公告)号：EP2795862B1

    公开(公告)日：2017-07-26

    申请号：EP12859824.0

    申请日：2012-10-19

    申请人： Telefonaktiebolaget LM Ericsson (publ)

    发明人： REXBERG, Leonard ,  MALMQVIST, Håkan

    IPC分类号： H04L27/26 ,  H04L5/00 ,  H04B1/00

    CPC分类号： H04L27/2624 ,  H04B1/0046 ,  H04B1/005 ,  H04B1/0475 ,  H04L5/001

    摘要： Clipping a widely-separated, multi-carrier signal is effectively performed without having to use a high sampling speed. Clipping is performed in a first stage at a combined signal level, but with a predetermined carrier separation of at least twice the channel bandwidth (2CBW), followed by repositioning the carriers at baseband zero frequency. After clipping, carriers are placed at their respective center frequencies with full carrier separation reintroduced in a second stage. Iterative clipping stages smooth out signal reshaping and re-settled amplitudes for combined carriers.

    摘要翻译： 剪切广泛分离的多载波信号可以有效地执行，而无需使用高采样速度。 在组合信号电平的第一级中执行剪切，但是具有至少两倍信道带宽（2CBW）的预定载波间隔，然后将载波重新定位在基带零频率。 在削波之后，载波被放置在它们各自的中心频率上，并在第二阶段重新引入全载波分离。 迭代限幅阶段平滑信号整形和组合载波的振幅。

    HETERODYNE RECEIVER STRUCTURE, MULTI CHIP MODULE, MULTI INTEGRATED CIRCUIT MODULE, AND METHOD FOR PROCESSING A RADIO FREQUENCY SIGNAL
    2.
    发明公开
    HETERODYNE RECEIVER STRUCTURE, MULTI CHIP MODULE, MULTI INTEGRATED CIRCUIT MODULE, AND METHOD FOR PROCESSING A RADIO FREQUENCY SIGNAL 有权
    干扰接收器结构，更多的芯片MODULE多个集成电路MODULE AND METHOD FOR处理的射频信号

    公开(公告)号：EP2789105A1

    公开(公告)日：2014-10-15

    申请号：EP12855394.8

    申请日：2012-02-07

    申请人： Telefonaktiebolaget LM Ericsson (PUBL)

    发明人： SAHLMAN, Karl-Gösta ,  LIEBACK, Tomas

    IPC分类号： H04B1/06 ,  H03H17/06 ,  H03D7/18 ,  H03M1/12

    CPC分类号： H03D7/18 ,  H04B1/0021 ,  H04B1/0046 ,  H04B1/06

    摘要： A heterodyne receiver structure comprises a frequency conversion block arranged to convert an incoming analogue radio frequency (RF) signal to an analogue intermediate frequency (IF) signal; a filter block arranged to filter said analogue IF signal; and an analogue-to-digital (AD) converter block arranged to convert said filtered analogue IF signal to a digital signal, wherein the AD converter block (309) is arranged to convert the filtered analogue IF signal to the digital signal by using a sampling frequency (fs) which is at least N times a maximum bandwidth of the filtered analogue IF signal, wherein the frequency spectrum from zero to the sampling frequency is divided into N frequency zones of equal width, wherein N is an even positive number higher than two; the frequency conversion block (304) is arranged to convert the incoming analogue RF signal to the analogue IF signal such that the analogue IF signal is located in any of the N/2-1 frequency zones having lowest frequency; and the filter block (306-308) is arranged to low pass the analogue IF signal such that any disturbing signal located in a zone, which would have a mirror image after the AD conversion in the zone, in which the analogue IF signal is located, is filtered away, wherein the heterodyne receiver structure further comprises a digital signal processing block (311) arranged to filter said digital signal.

    MULTI-BAND CREST FACTOR REDUCTION
    5.
    发明公开
    MULTI-BAND CREST FACTOR REDUCTION 有权
    多个带的波峰因数降低

    公开(公告)号：EP2795862A2

    公开(公告)日：2014-10-29

    申请号：EP12859824.0

    申请日：2012-10-19

    申请人： Telefonaktiebolaget LM Ericsson (Publ)

    发明人： REXBERG, Leonard ,  MALMQVIST, Håkan

    IPC分类号： H04L27/26

    CPC分类号： H04L27/2624 ,  H04B1/0046 ,  H04B1/005 ,  H04B1/0475 ,  H04L5/001

    摘要： Clipping a widely-separated,multi-carrier signal is effectively performed without having to use a high sampling speed. Clipping is performed in a first stage at a combined signal level, but with a predetermined carrier separation of at least twice the channel bandwidth (2CBW), followed by repositioning the carriers at baseband zero frequency. After clipping, carriers are placed at their respective center frequencies with full carrier separation reintroduced in a second stage. Iterative clipping stages smooth out signal reshaping and re-settled amplitudes for combined carriers.

    APPARATUS FOR PERFORMING FREQUENCY CONVERSION IN A COMMUNICATION SYSTEM
    6.
    发明公开
    APPARATUS FOR PERFORMING FREQUENCY CONVERSION IN A COMMUNICATION SYSTEM 失效
    在EINER TELEKOMMUNIKATIONSANORDNUNG的FREQUENZUMSETZER

    公开(公告)号：EP0716788A4

    公开(公告)日：1996-11-06

    申请号：EP95922104

    申请日：1995-05-26

    申请人： MOTOROLA ENERGY SYSTEMS INC

    发明人： STEWART KENNETH A ,  LOVE ROBERT T

    IPC分类号： H03D3/00 ,  H04B1/26 ,  H04B1/69

    CPC分类号： H04B1/0021 ,  H03D3/007 ,  H03D2200/005 ,  H03D2200/0056 ,  H03D2200/006 ,  H03D2200/0068 ,  H03D2200/0072 ,  H03D2200/008 ,  H04B1/0003 ,  H04B1/0032 ,  H04B1/0046 ,  H04B1/26

    摘要： An efficient apparatus for performing frequency conversion from a final IF frequency to a baseband frequency is described. A counter (401) generates two logical signals G1 (402) and G2 (403) which are passed to an exclusive-OR gate (404) and a multiplexer (406). When a control signal (411) is deasserted, multiplexer (406) passes signal G1 to I1 and signal G2 to I2; when control signal (411) is asserted, multiplexer (406) passes binary signal G1 to I2 (410) and signal G2 to I1 (407). Similarly, multiplexer (405) swaps its input real and imaginary samples when the output of exclusive-OR gate (404) is asserted; otherwise, it performs no operation on its input samples. Signals I1 (407) and I2 (410) are used to control arithmetic inverters (408) and (409) respectively. When the controlling signal for either inverter is asserted, the inventer performs arithmetic inversion, otherwise it performs no operation.

    摘要翻译： 描述了用于执行从最终IF频率到基带频率的频率转换的有效设备。 计数器（401）产生传送到异或门（404）和多路复用器（406）的两个逻辑信号G1（402）和G2（403）。 当控制信号（411）无效时，多路复用器（406）将信号G1传递给I1并将信号G2传递给I2; 当控制信号（411）被断言时，多路复用器（406）将二进制信号G1传递给I2（410）并将信号G2传递给I1（407）。 类似地，当异或门（404）的输出被声明时，多路复用器（405）交换其输入实数和虚数样本; 否则，它不会对其输入采样执行任何操作。 信号I1（407）和I2（410）分别用于控制算术逆变器（408）和（409）。 当任一个逆变器的控制信号有效时，本发明人执行算术逆变，否则它不执行任何操作。

    Method and arrangement for signal processing in a receiver that can be tuned to different carriers
    8.
    发明公开
    Method and arrangement for signal processing in a receiver that can be tuned to different carriers 审中-公开
    方法和装置用于在接收器的信号处理可被调谐到不同载波

    公开(公告)号：EP2086116A3

    公开(公告)日：2013-10-16

    申请号：EP09151586.6

    申请日：2009-01-29

    申请人： ST Wireless SA

    发明人： Aue, Volker ,  Amiot, Sebastien

    IPC分类号： H04B1/30 ,  H04L27/26 ,  H04B1/10 ,  H04B1/00

    CPC分类号： H04B1/30 ,  H04B1/0028 ,  H04B1/0046 ,  H04B1/1036 ,  H04L25/03821 ,  H04L27/2657

    摘要： The invention, which relates to a method and an arrangement for signal processing in a receiver that can be tuned to different carriers, is based on the object of providing a method and an associated circuit arrangement for signal processing whereby the outlay in the development and production of receivers that support a plurality of standards and the space requirement on the chip arc reduced. According to the invention, the object formulated is achieved according to the method by virtue of the fact that the energy of the adjacent carriers N + 1 and N - 1, wherein a carrier N contains a signal of interest and the receiver is tuned to it, is determined from the digital signal, in that the energy value of the carriers N + 1 and N - 1 determined are compared with a threshold value, in that in the case where the threshold value is exceeded, a frequency shift of the signal by +Δ f or -Δ f is effected in the second method step prior to the filtering, and in that the frequency shift thus produced is reversed by a frequency shift by -Δ f or +Δ f in the fourth method step prior to the filtering and the signal is decoded.

    INTEGRATED MIXED-SIGNAL ASIC WITH ADC, DAC, AND DSP
    10.
    发明公开
    INTEGRATED MIXED-SIGNAL ASIC WITH ADC, DAC, AND DSP 审中-公开
    INTEGRIERTE MISCHSIGNAL-ASIC MIT ADC，DAC UND DSP

    公开(公告)号：EP3146685A1

    公开(公告)日：2017-03-29

    申请号：EP15831689.3

    申请日：2015-08-17

    申请人： Seakr Engineering, Inc.

    发明人： BUEHLER, Erik ,  VAN BUREN, Damon ,  RUTT, Paul

    IPC分类号： H04L25/02 ,  H03M1/00

    CPC分类号： H04B7/18515 ,  H04B1/0039 ,  H04B1/0042 ,  H04B1/0046 ,  H04B1/44 ,  H04B7/08 ,  H04B7/1851 ,  H04B7/212

    摘要： An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

    摘要翻译： 用于卫星应用的集成模数转换和数模转换（ADDA）射频收发器，配置为取代常规模拟RF下降转换电路。 ADDA RF收发器包括一个更多的ADC，DSP和DAC，都在单个ASIC上。 此外，该电路对于在空间环境中存在的电离辐射环境中的高可用性和可靠性是耐辐射的。