摘要:
In a solid state image pickup apparatus having a plurality of photoelectric conversion elements including a standard signal outputting photoelectric conversion element group for outputting standard signals and an effective signal outputting photoelectric conversion element group for outputting effective signals, a scanner circuit for sequentially reading signals from the photoelectric elements, and a selector circuit for selectively reading an optional element group in the effective signal outputting photoelectric conversion element group, the scanner circuit reads both the standard signal outputting photoelectric conversion element group and the optional element group in the effective signal outputting photoelectric conversion element group selected by the selector circuit.
摘要:
A signal processing device is provided which is capable of suppressing a voltage change of a power supply when output signals from a plurality of signal sources are read, and capable of outputting a stable signal at a high sensitivity, and an image pickup apparatus using such a signal processing device is also provided. The signal processing device has: a plurality of terminals connectable to a plurality of signal sources; and a read circuit for converting signals input from the terminals into serial signals and outputting the serial signals, wherein: the read circuit comprises a holding capacitor connected to each of the terminals, a transfer switch for transferring a signal held in the holding capacitor to a common signal line, and a shift register for driving the transfer switch; and a semiconductor layer under the common signal line has a conductivity type opposite to a first conductivity type of a semiconductor substrate.
摘要:
A solid-state imaging apparatus comprises a plurality of matrix pixels, a reference signal generator for generating a ramp signal, a counter for performing counting according to the ramp signal output, and an AD converter, arranged for each pixel column, for performing AD conversion by comparing a pixel signal from the pixel with the ramp signal. Further, the AD converter includes a comparator to which the pixel signal and the reference signal are input, a storage for storing the AD conversion result, and an slope converter, between the output terminal of the reference signal generator and the input terminal of the comparator, for changing a gradient of the ramp signal, so that the noise overlaid on the ramp signal changes depending on the gradient of the ramp signal. Thus, it is possible to prevent generation of a horizontal-line noise in the ramp signal.
摘要:
A solid-state imaging apparatus includes: a ramp signal generator for generating first and second time-changing ramp signals during first and second analog-to-digital conversion periods, respectively; comparators for comparing a reset signal of a pixel with the first ramp signal during the first analog-to-digital conversion period, and comparing a pixel signal with the second ramp signal during the second analog-to-digital conversion period; and memories for storing, as first and second digital data, count values of counting from a start of changing the first and second ramp signals until an inversion of outputs of the comparators, during the first and second analog-to-digital conversion periods, wherein the ramp signal generator supplies a current from a current generator to a first capacitor element by a sampling and holding operation of a switch, and generates the first and second ramp signals based on the same bias voltage held by the first capacitor element.
摘要:
There is provided an image pickup apparatus including a pixel including a photoelectric conversion element and an amplification element for amplifying and outputting a signal generated at the photoelectric conversion element, a load transistor for controlling an electric current flowing at the amplification element, and a potential control element for suppressing potential fluctuation in a first main electrode region of the load transistor which is an output side of the amplification element.
摘要:
It is an object of the present invention to provide a solid-state imaging apparatus that outputs digital signals at high speed. A solid-state imaging apparatus is provided that includes plural analog-to-digital converters (102) that convert analog signals obtained by photoelectric conversion into digital signals, plural digital memories (103) that store the digital signals converted by the analog-to-digital converters, plural block digital output lines (104) that are provided to correspond to blocks of the plural digital memories and to which the digital signals stored in the plural digital memories included in the blocks are output, a common digital output line (108) that outputs the digital signals output from the plural block digital output lines, buffer circuits (105) that buffer the digital signals output from the block digital output lines, and block selecting units (106) that can switch the block digital output lines electrically connected to the common digital output line.
摘要:
An imaging system (90, 490, 590, 690) includes an image sensor (100, 400, 500, 600) and a mechanical shutter (93) which controls the termination of exposure of the image sensor. The image sensor includes a pixel array (PA) in which a plurality of pixels are arrayed in a matrix, and a vertical scanning unit (220, 420, 520, 620) which scans the pixel array for each row. The vertical scanning unit parallelly executes some of the reset operations of pixels on at least two adjacent rows of the pixel array. The charge accumulation operation of pixels starts upon completion of the reset operation and terminates in response to light shielding by the mechanical shutter.
摘要:
A photoelectric conversion device formed on a single semiconductor substrate, including: a plurality of photoelectric conversion elements; a read-out circuit including a switch for reading out analog signals from the photoelectric conversion elements; a buffer circuit for driving the switch; and a logic circuit for processing digital signals. A first semiconductor area to which a ground level for the buffer circuit is supplied and a second semiconductor area to which a ground level for the logic circuit is supplied are electrically separated from each other.