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40 条记录 (耗时 0.011 秒)

    Transistor circuit
    11.
    发明公开
    Transistor circuit 失效
    Transistorschaltung。

    公开(公告)号：EP0380152A1

    公开(公告)日：1990-08-01

    申请号：EP90200067.8

    申请日：1990-01-11

    申请人： Philips Electronics N.V.

    发明人： Seevinck, Evert ,  Dikken, Jan ,  Schumacher, Hans-Jürgen Otto

    IPC分类号： H03F3/45 ,  H03K5/02

    CPC分类号： H03K19/00361 ,  H03F1/3211 ,  H03F3/4565 ,  H03F3/45654 ,  H03F3/45659 ,  H03F2203/45394 ,  H03K19/018521

    摘要： A transistor circuit (1), comprising a first differential amplifier (N₁, N₂) which is composed of a differential pair (N₁, N₂) and a current mirror (P₂, P₃). The transistor circuit in accordance with the invention comprises a second differential amplifier (10) which measures a differential offset voltage and reduces this offset voltage by means of common mode current feedback. The transistor circuit thus offers a stable amplifier having a high speed and a low offset voltage. Such a transistor circuit can be advantageously used in a logic output buffer so that, for example an ECL output buffer can be realized in CMOS.

    摘要翻译： 一种晶体管电路（1），包括由差分对（N1，N2）和电流镜（P2，P3）组成的第一差分放大器（N1，N2）。 根据本发明的晶体管电路包括测量差分偏移电压并通过共模电流反馈减小该偏移电压的第二差分放大器（10）。 因此，晶体管电路提供了具有高速度和低失调电压的稳定放大器。 这样的晶体管电路可以有利地用在逻辑输出缓冲器中，使得例如ECL输出缓冲器可以在CMOS中实现。

    Amplifier arrangement
    13.
    发明公开
    Amplifier arrangement 失效
    放大器排列

    公开(公告)号：EP0309063A1

    公开(公告)日：1989-03-29

    申请号：EP88202067.0

    申请日：1988-09-22

    申请人： Philips Electronics N.V.

    发明人： Seevinck, Evert ,  de Jager, Willem ,  Buitendijk, Pieter

    IPC分类号： H03F3/30 ,  H03F1/32

    CPC分类号： H03F3/3093 ,  H03F1/3217 ,  H03F2203/30045

    摘要： The first (T₁) and the second (T₂) output transistor of an amplifier arrangement are push-pull driven by means of a drive circuit (10) having two transistors (T₁₁, T₁₂) which are each loaded by a current source (T₁₃, T₁₄). Currents which are a measure of the currents flowing through the first (T₁) and the second (T₂) output transistor are generated by a first (20) and second (30) current measuring means. These currents are applied to a negative feedback means (40) which controls the current intensity of the current sources (T₁₃, T₁₄) in such a way that the harmonic mean value of the currents flowing through the first (T₁) and the second (T₂) output transistor is substantially equal to a reference value.

    摘要翻译： 放大器装置的第一（T 1）和第二（T 2）输出晶体管通过具有两个晶体管（T 11，T 12）的驱动电路（10）进行推挽驱动，每个晶体管由电流源（T 13， T₁₄）。 用第一（20）和第二（30）电流测量装置产生流过第一（T 1）和第二（T 2）输出晶体管的电流的量度的电流。 这些电流加到负反馈装置（40），该装置控制电流源（T 13，T 14）的电流强度，使得流过第一（T 1）和第二（T 2）电流的谐波平均值 ）输出晶体管基本上等于参考值。

    Amplifier arrangement
    14.
    发明公开
    Amplifier arrangement 失效
    Verstärkereinrichtung。

    公开(公告)号：EP0173370A1

    公开(公告)日：1986-03-05

    申请号：EP85201180.8

    申请日：1985-07-12

    申请人： Philips Electronics N.V.

    发明人： Seevinck, Evert ,  Wassenaar, Roelof Foppe

    IPC分类号： H03F1/02 ,  H03F3/45

    CPC分类号： H03F3/45183 ,  H03F1/0261 ,  H03F2203/45364 ,  H03F2203/45466 ,  H03F2203/45674

    摘要： 57 A bias current (I t ) which is dependent on the input signal (V i ) is applied to the junction point (2) of the source electrodes of a first and a second transistor (T 1 , T 2 ). The amplifier comprises a control circuit, which ensures that this bias current (l t ) cannot increase more than is necessary to obtain a high slew rate, thereby minimizing dissipation by the arrangement. This control circuit comprises a third and a fourth transistor (T 3 , T 4 ) which are arranged in parallel with the first transistor (T,) and the second transistor (T 2 ), respectively, and which carry currents (l 3 ,l 4 ) which are proportional to the currents (l 1 , l 2 ) in the first and the second transistor (T,, T 2 ). A selection circuit (5) applies the smaller of the two currents (I 3 , 1 4 ) in the third and the fourth transistor (T 3 , T 4 ) to an output (8), where this current is compared with a reference current (I 0 ) from a current source (9). The difference between these currents is applied to a current amplifier (10), which supplies an increasing bias current (l t ) until the smaller of the two currents (1 3 , 1 4 ) in the third and the fourth transistor (T 3 , T 4 ) has become equal to the reference current (l o ).

    摘要翻译： 依赖于输入信号（Vi）的偏置电流（It）被施加到第一和第二晶体管（T1，T2）的源极的接合点（2）。 该放大器包括控制电路，其确保该偏置电流（It）不能比获得高压摆率所需的增加更多，从而通过该布置最小化耗散。 该控制电路包括分别与第一晶体管（T1）和第二晶体管（T2）并联布置的第三和第四晶体管（T3，T4），并且具有与 第一和第二晶体管（T1，T2）中的电流（I1，I2）。 选择电路（5）将第三和第四晶体管（T3，T4）中的两个电流（I3，I4）中的较小的一个电路施加到输出（8），其中该电流与基准电流（I0） 电流源（9）。 这些电流之间的差异被施加到电流放大器（10），其提供增加的偏置电流（It），直到第三和第四晶体管（T3，T4）中的两个电流（I3，I4）中的较小的一个 等于参考电流（I0）。

    Integrated memory comprising a sense amplifier
    16.
    发明公开
    Integrated memory comprising a sense amplifier 失效
    Integrierte Speicherschaltung mit einemLeseverstärker。

    公开(公告)号：EP0400728A1

    公开(公告)日：1990-12-05

    申请号：EP90201314.3

    申请日：1990-05-25

    申请人： Philips Electronics N.V.

    发明人： Seevinck, Evert

    IPC分类号： G11C7/06 ,  G11C11/419

    CPC分类号： G11C7/065 ,  G11C11/419

    摘要： An integrated memory comprising a sense amplifier which has an equalizing effect on voltages on the inputs of the sense amplifier, the sense amplifier comprising a parallel connection of a first and a second current branch, each current branch including a control transistor whose source is connected to a relevant input and whose gate is connected to the drain of the control transistor in the other current branch, a load transistor whose gate receives a selection signal being connected in said current branch in series with the control transistor.

    摘要翻译： 一种集成存储器，包括对感测放大器的输入端上的电压具有均衡效应的读出放大器，读出放大器包括第一和第二电流分支的并联连接，每个电流分支包括控制晶体管，源极连接到 一个相关输入端，其栅极连接到另一个电流支路中的控制晶体管的漏极;一个负载晶体管，其栅极接收与所述控制晶体管串联在所述电流支路中的选择信号。

    Transconductance circuit
    18.
    发明公开
    Transconductance circuit 失效
    Steilheitsschaltung。

    公开(公告)号：EP0344855A1

    公开(公告)日：1989-12-06

    申请号：EP89201363.2

    申请日：1989-05-29

    申请人： Philips Electronics N.V.

    发明人： De Jager, Willem ,  Seevinck, Evert

    IPC分类号： H03F3/45 ,  H03F1/32

    CPC分类号： H03F3/45089 ,  H03F1/3211

    摘要： A amplifier circuit comprises a first transistor (T₁) and a second transistor (T₂) whose emitters are each connected via a first resistor (R₁) to a point (2) which is connected to the power-­supply terminal (3) by means of a current source (1). The bases of said transistors are connected to input terminals (4, 5) and via a second resistor (R₂) each to the base of a third transistor (T₃) whose emitter is connected to the terminal (2). The linearity of the circuit is improved by arranging a fourth transistor (T₄) and a fifth transistor (T₅) in series with the collector-emitter paths of the first transistor (T₁) and the second transistor (T₂) which fourth and fifth transistor have their bases connected to a reference terminal (7) and have their emitters interconnected by means of a third resistor (R₃).

    摘要翻译： 放大器电路包括第一晶体管（T1）和第二晶体管（T2），其发射极各自经由第一电阻器（R1）连接到点（2），点（2）通过以下方式连接到电源端子 电流源（1）。 所述晶体管的基极连接到输入端子（4,5），并通过第二电阻器（R2）连接到发射极连接到端子（2）的第三晶体管（T3）的基极。 通过将第四晶体管（T4）和第五晶体管（T5）与第四和第五晶体管的第一晶体管（T1）和第二晶体管（T2）的集电极 - 发射极路径串联而提高电路的线性度 其基极连接到参考端子（7），并且其发射极通过第三电阻器（R3）互连。