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101 条记录 (耗时 0.018 秒)

    SELECTIVE PRECLUSION OF A BUS ACCESS REQUEST
    12.
    发明公开
    SELECTIVE PRECLUSION OF A BUS ACCESS REQUEST 审中-公开
    SELEKTIVER VORAUSSCHLUSS EINER BUSZUGRIFFSANFORDERUNG

    公开(公告)号：EP2223225A1

    公开(公告)日：2010-09-01

    申请号：EP08852560.5

    申请日：2008-11-19

    申请人： QUALCOMM Incorporated

    发明人： CODRESCU, Lucian ,  INGLE, Ajay, A. ,  KOOB, Christopher, E. ,  PLONDKE, Erich, J.

    IPC分类号： G06F13/16 ,  G06F12/08

    CPC分类号： G06F13/161

    摘要： A system and method for selective preclusion of bus access requests are disclosed. In an embodiment, a method includes determining a bus unit access setting at a logic circuit of a processor. The method also includes selectively precluding a bus unit access request based on the bus unit access setting.

    摘要翻译： 公开了一种用于选择性地排除总线访问请求的系统和方法。 在一个实施例中，一种方法包括确定在处理器的逻辑电路处的总线单元访问设置。 该方法还包括基于总线单元访问设置选择性地排除总线单元访问请求。

    METHOD AND SYSTEM TO INDICATE AN EXCEPTION-TRIGGERING PAGE WITHIN A MICROPROCESSOR
    15.
    发明公开
    METHOD AND SYSTEM TO INDICATE AN EXCEPTION-TRIGGERING PAGE WITHIN A MICROPROCESSOR 审中-公开
    于显示的bug的方法和系统发布页在微处理器

    公开(公告)号：EP2050003A1

    公开(公告)日：2009-04-22

    申请号：EP07799586.8

    申请日：2007-07-13

    申请人： QUALCOMM Incorporated

    发明人： CODRESCU, Lucian ,  PLONDKE, Erich ,  AHMED, Muhammad ,  JANJANAM, Vijaya Kumar

    IPC分类号： G06F12/10

    CPC分类号： G06F12/1009 ,  G06F12/1027 ,  G06F2212/684

    摘要： A method and system to indicate which page within a software-managed page table triggers an exception within a microprocessor, such as, for example, a digital signal processor, wherein a software-managed translation lookaside buffer (TLB) module receives a virtual address produced by an instruction within a Very Long Instruction Word (VLIW) packet, such as, for example, a fetch instruction, and further compares the virtual address to each stored TLB entry. If a match exists, then the TLB module outputs a corresponding mapped physical address for the instruction. Otherwise, if the VLIW packet spans two pages, where a first page is present as a TLB entry within the TLB module and the second page is missing from the stored TLB entries, an indication bit within a data field of a control register is set to identify the TLB miss exception to a software management unit. The software management unit retrieves the indication bit information from the register and further performs a page table look-up within the software-managed page table using the indication bit information in order to retrieve the missing page information. Subsequently, the missing page information is written into a new TLB entry within the TLB module for subsequent virtual address translation and execution of the packet of instructions.

    VITERBI PACK INSTRUCTION
    16.
    发明公开
    VITERBI PACK INSTRUCTION 审中-公开
    维特比包装上

    公开(公告)号：EP1997229A2

    公开(公告)日：2008-12-03

    申请号：EP07759275.6

    申请日：2007-03-23

    申请人： QUALCOMM Incorporated

    发明人： ZENG, Mao ,  CODRESCU, Lucian

    IPC分类号： H03M13/41

    CPC分类号： H03M13/4107 ,  H03M13/41 ,  H03M13/4169 ,  H03M13/6505

    摘要： A Viterbi pack instruction is disclosed that masks the contents of a first predicate register with a first masking value and masks the contents of a second predicate register with a second masking value. The resulting masked data is written to a destination register. The Viterbi pack instruction may be implemented in hardware, firmware, software, or any combination thereof.

    MEMORY WITH METADATA STORED IN A PORTION OF THE MEMORY PAGES
    19.
    发明授权
    MEMORY WITH METADATA STORED IN A PORTION OF THE MEMORY PAGES 有权

    公开(公告)号：EP2710472B1

    公开(公告)日：2018-10-10

    申请号：EP12726665.8

    申请日：2012-05-21

    申请人： Qualcomm Incorporated

    发明人： PLONDKE, Erich, James ,  CODRESCU, Lucian ,  ANDERSON, William, C.

    IPC分类号： G06F11/10

    CPC分类号： G06F12/0893 ,  G06F11/1064 ,  G06F12/0646 ,  Y02D10/13

    摘要： Systems and method for configuring a page-based memory device without pre-existing dedicated metadata. The method includes reading metadata from a metadata portion of a page of the memory device, and determining a characteristic of the page based on the metadata. The memory device may be configured as a cache. The metadata may include address tags, such that determining the characteristic may include determining if desired information is present in the page, and reading the desired information if it is determined to be present in the page. The metadata may also include error-correcting code (ECC), such that determining the characteristic may include detecting errors present in data stored in the page. The metadata may further include directory information, memory coherency information, or dirty/valid/lock information.