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    PAGE BUFFER PROGRAM COMMAND AND METHODS TO REPROGRAM PAGES WITHOUT RE-INPUTTING DATA TO A MEMORY DEVICE
    12.
    发明公开
    PAGE BUFFER PROGRAM COMMAND AND METHODS TO REPROGRAM PAGES WITHOUT RE-INPUTTING DATA TO A MEMORY DEVICE 有权
    页缓冲器-PROGRAMMIERBEFEHL和方法用于启动无SEITENNEUPROGRAMMIERUNG数据重新录入

    公开(公告)号：EP2351040A1

    公开(公告)日：2011-08-03

    申请号：EP09792884.0

    申请日：2009-09-23

    Applicant: Sandisk 3D LLC

    Inventor： FASOLI, Luca ,  ZHANG, Yuheng ,  BALAKRISHNAN, Gopinath

    IPC: G11C16/10

    CPC classification number: G11C16/102 ,  G06F12/0246

    Abstract: A technique for efficiently handling write operation failures in a memory device which communicates with an external host device allows a page of data to be re-written to a memory array from a page buffer. The host provides user data, a first write address and a write command to the memory device. If the write attempt fails, the host provides a re-write command with a new address, without re-sending the user data to the memory device. Additional data can be received at a data cache of the memory device while a re-write from the page buffer is in progress. The re-written data may be obtained in a copy operation in which the data is read out to the host, modified and written back to the memory device. Additional data can be input to the memory device during the copy operation. Page buffer data can also be modified in place.

    Method of using flash memory for storing metering data
    15.
    发明公开
    Method of using flash memory for storing metering data 审中-公开
    Verfahren zur Verwendung eines Flash-Speichers zum Speichern von Messdaten

    公开(公告)号：EP2330575A2

    公开(公告)日：2011-06-08

    申请号：EP11154116.5

    申请日：2005-09-20

    Applicant: Itron, Inc.

    Inventor： Seal, Brian ,  Norrod, Eric ,  Simmons, Stephen

    IPC: G08B23/00 ,  G11C16/10 ,  G11C14/00

    CPC classification number: G11C16/102 ,  G01D9/005 ,  G11C5/143 ,  G11C14/00 ,  G11C16/105

    Abstract: The invention relates to a method of storing continuously updated meter data in a utility meter, comprising the steps of: providing a plurality of memory structures including at least one associated memory buffer characterized by a first predetermined storage size and a non-volatile flash memory structure having a plurality of flash memory blocks each characterized by a second predetermined storage size; obtaining updated meter data representative of a measured or distributed amount of utility product or service; storing said updated meter data in the at least one associated memory buffer; detecting when power to the utility meter is disabled; and copying the updated meter data in said at least one associated memory buffer into at least one selected flash memory block of said non-volatile flash memory structure, wherein said at least one selected flash memory block is determined via a flash pointer indicative of such location.

    Abstract translation: 本发明涉及一种在公用事业计量表中存储连续更新的仪表数据的方法，包括以下步骤：提供多个存储器结构，其包括至少一个相关联的存储器缓冲器，其特征在于第一预定存储器大小和非易失性闪速存储器结构 具有多个闪存块，每个闪存块的特征在于第二预定存储尺寸; 获取表示测量或分发的公用事业产品或服务量的更新的仪表数据; 将所述更新的仪表数据存储在所述至少一个关联的存储器缓冲器中; 检测到公用电表的电源是否被禁用; 以及将所述至少一个相关联的存储器缓冲器中的更新的仪表数据复制到所述非易失性闪速存储器结构的至少一个选择的闪速存储器块中，其中所述至少一个选择的闪速存储器块经由指示这样位置的闪存指示器来确定 。

    VERFAHREN ZUR PROGRAMMIERUNG EINES STEUERGERÄTES EINES KRAFTFAHRZEUGS
    17.
    发明授权
    VERFAHREN ZUR PROGRAMMIERUNG EINES STEUERGERÄTES EINES KRAFTFAHRZEUGS 有权
    方法编程的机动车辆的控制器

    公开(公告)号：EP2052300B1

    公开(公告)日：2010-11-17

    申请号：EP07786541.8

    申请日：2007-08-03

    Applicant: Bayerische Motoren Werke Aktiengesellschaft

    Inventor： TORLO, Marc ,  MÜLLER, Stefan

    IPC: G05B19/042 ,  G11C16/10

    CPC classification number: G11C16/102 ,  G05B19/0426 ,  G05B2219/23304 ,  G05B2219/2637 ,  G06F8/65

    Abstract: The invention relates particularly to a method for programming a controller in a motor vehicle, where the controller has at least one program-controlled processor and at least two individually addresssable memory areas, particularly at least two physically separate memory chips. To speed up the writing of memory contents, the invention proposes that the processor at least intermittently perform or prompt the following steps, largely simultaneously. First, checking whether programs, program parts and/or data already written to the first memory area correspond to the data needing to be written to the first memory area, and secondly writing a program, a program part and/or data to the second memory area.

    MEMORY SYSTEM
    18.
    发明公开
    MEMORY SYSTEM 有权
    存储系统

    公开(公告)号：EP2248026A1

    公开(公告)日：2010-11-10

    申请号：EP09711527.3

    申请日：2009-02-10

    Applicant: Kabushiki Kaisha Toshiba

    Inventor： YANO, Junji ,  MATSUZAKI, Hidenori ,  HATSUDA, Kosuke

    IPC: G06F12/16 ,  G06F12/00 ,  G11C16/02 ,  G11C16/10

    CPC classification number: G11C16/102 ,  G06F11/141 ,  G06F11/1443 ,  G06F11/1471 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/105 ,  G11C29/00

    Abstract: A memory system includes a volatile first storing unit, a nonvolatile second storing unit in which a plurality of memory cells that can store multi-value data are arranged, the memory cells having a plurality of pages, and a controller that performs data transfer between a host apparatus and the second storing unit via the first storing unit. The controller includes a save processing unit that backs up, when, before data is written in the second storing unit in a write-once manner, data is written in a lower order page of a memory cell same as that of a page in which the data is written, the data of the lower order page and a broken-information-restoration processing unit that restores, when the data in the lower order page is broken, the broken data using the backed-up data.

    Abstract translation: 存储器系统包括：易失性第一存储单元;非易失性第二存储单元，其中可以存储多值数据的多个存储器单元被排列，存储器单元具有多个页面;以及控制器，其执行数据传输 主机装置和第二存储单元。 所述控制器包括保存处理单元，所述保存处理单元在将数据以一次写入方式写入所述第二存储单元之前时，将数据写入存储单元的低位页中，所述存储单元与其中所述存储单元 数据被写入时，下位页面的数据以及当下位页面中的数据被破坏时使用备份数据恢复破碎数据的破碎信息恢复处理单元。

    MEMORY SYSTEM
    20.
    发明公开
    MEMORY SYSTEM 有权
    存储系统

    公开(公告)号：EP2115594A1

    公开(公告)日：2009-11-11

    申请号：EP09709442.9

    申请日：2009-03-03

    Applicant: Kabushiki Kaisha Toshiba

    Inventor： NAGADOMI, Yasushi ,  TAKASHIMA, Daisaburo ,  HATSUDA, Kosuke

    IPC: G06F12/02 ,  G06F12/00

    CPC classification number: G06F11/1016 ,  G06F12/0246 ,  G06F2212/7203 ,  G06F2212/7209 ,  G11C16/102

    Abstract: A memory system (10) is disclosed, which comprises a flash-EEPROM nonvolatile memory (11) having a plurality of memory cells that have floating gates and in which data items are electrically erasable and writable, a cache memory (13) that temporarily stores data of the flash-EEPROM nonvolatile memory (11), a control circuit (12, 14) that controls the flash-EEPROM nonvolatile memory (11) and the cache memory (13), and an interface circuit (16) that communicates with a host, in which the control circuit functions to read data from a desired target area to-be-determined of the flash-EEPROM nonvolatile memory and detect an erased area to determine a written area/unwritten area by using as a determination condition whether or not a count number of data '0' of the read data has reached a preset criterion count number.

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