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    SAMPLE-DEPENDENT AMPLIFICATION OF MAGNETIC RESONANCE SIGNAL
    12.
    发明公开
    SAMPLE-DEPENDENT AMPLIFICATION OF MAGNETIC RESONANCE SIGNAL 审中-公开
    一个磁信号采样相关增益

    公开(公告)号：EP2126597A2

    公开(公告)日：2009-12-02

    申请号：EP07859493.4

    申请日：2007-12-21

    申请人： Koninklijke Philips Electronics N.V.

    发明人： ROEVEN, Henricus Gerardus ,  BOEF, Johannes Hendrik

    IPC分类号： G01R33/20 ,  H03M1/18

    CPC分类号： H03M1/181 ,  G01R33/3621 ,  H03M1/186

    摘要： A digitizer for digitizing a magnetic resonance (MR) signal is hereby disclosed, the digitizer comprising at least two analog amplifiers (1021, 1022... 102n) electrically connected in parallel and configured to amplify the MR signal, wherein each analog amplifier has a different analog gain value, a measuring unit configured to measure a characteristic of the MR signal, a sample selection module (108) configured to generate a selection signal (SS) based on the measured characteristic, and a first analog-to-digital converter (104) configured to digitize the amplified MR signal from one of the at least two analog amplifiers, based on the selection signal.

    A/D CONVERTER AND READING CIRCUIT
    13.
    发明公开
    A/D CONVERTER AND READING CIRCUIT 有权
    A / D-WANDLER UND LESESCHALTUNG

    公开(公告)号：EP2048785A1

    公开(公告)日：2009-04-15

    申请号：EP07791671.6

    申请日：2007-07-31

    申请人： National University Corporation Shizuoka University

    发明人： KAWAHITO, Shoji

    IPC分类号： H03M1/14 ,  H03M1/08 ,  H04N5/335

    CPC分类号： H03M1/1245 ,  H03M1/181 ,  H04N5/3575 ,  H04N5/378

    摘要： An A/D converter 11 performs multiple-times sampling on a first signal S1 in a first period T1 while performing multiple-times sampling on a second signal S2 in a second period T2. An A/D converter circuit 17 provides a digital signal in response to a signal from an output 15b of a gain stage 15 in the second period T2. The digital signal may have a value "1" or a value "0". The A/D converter circuit 17 includes a circuit 18 providing a signal S A/DM corresponding to the number of times the value "1" appears. A switch 24 operates in response to a clock signal ϕs and is used to sample a signal from a pixel 2a. In a first capacitor circuit 27, a switch 29 and a capacitor 31 are connected to an inverting input 23a and a non-inverting output 23b, respectively. The switch 29 operates in response to a clock signal ϕ3 and is used for integration in the capacitor 31.

    摘要翻译： A / D转换器11对第一时段T1中的第一信号S1执行多次采样，同时在第二时段T2中对第二信号S2执行多次采样。 A / D转换电路17在第二时段T2中响应于来自增益级15的输出端15b的信号提供数字信号。 数字信号可以具有值“1”或值“0”。 A / D转换电路17包括电路18，其提供与出现值“1”的次数相对应的信号S A / DM。 开关24响应于时钟信号而工作，并用于对来自像素2a的信号进行采样。 在第一电容器电路27中，开关29和电容器31分别连接到反相输入端23a和非反相输出端23b。 开关29响应于时钟信号Õ3而工作，并用于积分在电容器31中。

    System and method for extending the dynamic range of an analog-to-digital converter
    14.
    发明公开
    System and method for extending the dynamic range of an analog-to-digital converter 有权
    用于扩展模数转换器的动态范围的系统和方法

    公开(公告)号：EP1414157A2

    公开(公告)日：2004-04-28

    申请号：EP03256627.5

    申请日：2003-10-21

    申请人： BEI Technologies, Inc.

    发明人： Loreck, Heinz

    IPC分类号： H03M1/18

    CPC分类号： H03M1/181

    摘要： System and method for improving the dynamic range of an A/D converter in which operation the A/D converter is monitored, and an offset signal is combined with an analog input signal to maintain the operation of the A/D converter within the dynamic range.

    摘要翻译： 用于改进A / D转换器的动态范围的系统和方法，其中A / D转换器的操作被监控，并且偏移信号与模拟输入信号组合以将A / D转换器的操作保持在动态范围内 。

    VERFAHREN ZUR MESSUNG ELEKTRISCHER LEISTUNG.
    16.
    发明公开
    VERFAHREN ZUR MESSUNG ELEKTRISCHER LEISTUNG. 失效
    法测量电力学报。

    公开(公告)号：EP0019621A1

    公开(公告)日：1980-12-10

    申请号：EP79901005

    申请日：1980-06-17

    申请人： LANDIS & GYR AG

    发明人： STEINLE BENEDIKT ,  SCHNEIDER GERNOT ,  NUENLIST HANS

    IPC分类号： G01R21/00 ,  G01R21/127 ,  G01R21/133 ,  H03M1/00 ,  H03K13/20

    CPC分类号： G01R21/133 ,  G01R21/127 ,  H03M1/181

    摘要： Un premier signal de mesure (u(t)) proportionnel a la tension et un deuxieme signal de mesure proportionnel au courant sont compares, dans un comparateur, avec un signal de reference (Ur(t)) periodique. Dans chaque demi-periode du signal de reference (Ur(t)) on etablit, par un comptage d'impulsions d'echantillonnage, une valeur numerique correspondant a la valeur instantanee ((Alpha)u1; (Alpha)u2) du premier signal de mesure (u(t)) au moment (P1; P2) ou elle est egale a celle du signal de reference (Ur(t)) et une valeur numerique correspondant a la valeur instantanee du deuxieme signal de mesure au moment ou elle est egale a celle du signal de reference et on multiplie entre elles ces deux valeurs. Dans une variante, on etablit et on multiplie entre elles, aussi bien dans chaque periode (Tr) du signal de reference (Ur(t)) que dans chaque periode (T'r) englobant la deuxieme demi-periode et la premiere demi-periode suivante du signal de reference, une valeur numerique correspondant a la valeur moyenne ((Alpha)U1; (Alpha)U2) du premier signal de mesure (u(t)) et une valeur numerique correspondant a la valeur moyenne du deuxieme signal de mesure. On obtient ainsi le doublement de la frequence a laquelle on etablit les valeurs, ce qui conduit a une division par quatre des erreurs de mesure.

    COMPARATOR TRACKING CONTROL SCHEME WITH DYNAMIC WINDOW LENGTH
    17.
    发明公开
    COMPARATOR TRACKING CONTROL SCHEME WITH DYNAMIC WINDOW LENGTH 审中-公开
    SCHEMAFÜRKOMPARATORVERFOLGUNGSSTEUERUNG MIT DYNAMISCHERFENSTERLÄNGE

    公开(公告)号：EP3132542A1

    公开(公告)日：2017-02-22

    申请号：EP15779212.8

    申请日：2015-04-06

    申请人： Cirrus Logic, Inc.

    发明人： HE, Ku ,  ZHAO, Xin ,  FEI, Xiaofan

    IPC分类号： H03M1/34

    CPC分类号： H03M1/002 ,  H03M1/0809 ,  H03M1/181 ,  H03M1/36

    摘要： A comparator tracking scheme for an analog-to-digital converter (ADC) may implement a dynamic window size by varying, over time, a number of comparators powered up to convert an analog input signal to a digital output signal. A comparator-tracking scheme may be implemented, for example, in a controller coupled to a plurality of comparators in an ADC. For example, the controller may determine a window size for the ADC and determine a window position for the ADC. The controller may then activate comparators of the ADC within a window centered at the window position and having a width of the window size. The controller may determine a window size by analyzing an output of a filter. When the filter output indicates a rapidly changing analog input signal, the controller may dynamically increase a window size of the ADC, which may increase a number of comparators powered on.

    摘要翻译： 用于模数转换器（ADC）的比较器跟踪方案可以通过随时间变化多个比较器通过上电将模拟输入信号转换为数字输出信号来实现动态窗口大小。 比较器跟踪方案可以例如在耦合到ADC中的多个比较器的控制器中实现。 例如，控制器可以确定ADC的窗口大小并确定ADC的窗口位置。 然后，控制器可以在以窗口位置为中心并具有窗口大小的宽度的窗口内激活ADC的比较器。 控制器可以通过分析滤波器的输出来确定窗口大小。 当滤波器输出指示快速变化的模拟输入信号时，控制器可以动态增加ADC的窗口大小，这可能会增加多个比较器上电。

    DYNAMICALLY ADJUSTED A/D RESOLUTION
    18.
    发明公开
    DYNAMICALLY ADJUSTED A/D RESOLUTION 审中-公开
    动态设定A / D分辨率

    公开(公告)号：EP2692061A1

    公开(公告)日：2014-02-05

    申请号：EP12714879.9

    申请日：2012-03-07

    申请人： Rosemount, Inc.

    发明人： RUD, Jason, H. ,  BRONCZYK, Andrew, J.

    IPC分类号： H03M1/18

    CPC分类号： H03M1/20 ,  H03M1/1235 ,  H03M1/181

    摘要： A process variable transmitter (10) is used to measure a process variable, and, in doing so, dynamically changes the resolution of the A/D converter (18) based upon the measured value of the analog input signal. This can be done by automatically adjusting the configurable resolution gain adjustment based on the value of the analog signal being measured, by normalizing the input signal being measured so that it is centered in an optimal resolution window of the A/D converter (18), or by adjusting a voltage reference provided to the A/D converter (18).

    SYSTEME ET PROCEDE DE COMMANDE D'UN CAPTEUR NUMERIQUE
    19.
    发明公开
    SYSTEME ET PROCEDE DE COMMANDE D'UN CAPTEUR NUMERIQUE 审中-公开
    系统和方法用于控制数字传感器

    公开(公告)号：EP2494695A1

    公开(公告)日：2012-09-05

    申请号：EP10774187.8

    申请日：2010-10-27

    申请人： Movea

    发明人： RICCARDI, Sébastien

    IPC分类号： H03M1/18

    CPC分类号： H03M1/181

    摘要： The system for controlling a digital sensor (CN) for measuring a physical quantity (GP) is furnished with a transducer (TRD) delivering at output an analogue signal representative of said physical quantity (GP), means (MGD) for implementing gain and/or shift on the analogue output signal (SA1) from said transducer (TRD), and with an analogue/digital converter (CAN) at the output of the sensor (CN) for delivering a digital signal (SN1). The system comprises, furthermore: first means (MA1) for applying a first shift to said analogue signal of the physical quantity (GP), second means (MA2) for applying a second shift to said digital signal (SN1), and control means (CMD) for continuously controlling said first application means (MA1), on the basis of said digital signal (SN1), and for continuously controlling said second application means (MA2), on the basis of said digital signal (SN1) and/or of said first shift.