Integrated circuit for physiological signal measurement
    2.
    发明公开
    Integrated circuit for physiological signal measurement 失效
    用于生理信号测量的集成电路

    公开(公告)号:EP0568198A3

    公开(公告)日:1994-09-21

    申请号:EP93302548.8

    申请日:1993-03-31

    IPC分类号: G01R19/25 A61B5/0428

    摘要: A mixed analog and digital integrated circuit for physiological signal instrumentation such as electrocardiographs, electromyographs, and electroencephalographs comprises analog signal amplifiers (126) connected to A/D converters (346) and an analog signal summer (122) for generating from analog averaging inputs (1300) an averaging output (336), and averaging switches (1302) which associate individual averaging inputs (1300) to the outputs of corresponding analog signal amplifiers (126) in dependence upon a digital averaging selection bits generated by a digital control (1902, 1904, 1906, 1912) in response to an external input (366). The integrated circuit has five signal channels, each with analog amplification and analog to digital conversion. The channels can be configured for various combinations of input signal amplification, input signal summation, analog output driving, and AC impedance measurement. The integrated circuit has two digital serial input lines and two digital serial output lines, all designed for direct connection to optical couplers. Channel configuration, gain, and other parameters are externally controllable by a serial digital input signal. Up to six compatible devices can be serially connected in a chain.

    Improved thermal inkjet printhead structure and method for making the same
    3.
    发明公开
    Improved thermal inkjet printhead structure and method for making the same 失效
    Thermische Tintenstrahldruckkopfstruktur und Herstellungsverfahren。

    公开(公告)号:EP0521634A2

    公开(公告)日:1993-01-07

    申请号:EP92305554.5

    申请日:1992-06-17

    IPC分类号: B41J2/16 B41J2/34

    摘要: An improved thermal inkjet printhead having MOSFET drive transistors (126) incorporated therein. The gate (110) of each MOSFET transistor (126) is formed by applying a layer (72) of silicon dioxide onto a silicon substrate (70), applying a layer (76) of silicon nitride onto the silicon dioxide, and applying a layer (90) of polycrystalline silicon onto the silicon nitride. Portions of the substrate (70) surrounding the gate (110) are oxidized, forming field oxide regions (84, 86). Source and drain regions (118, 120) are then conventionally formed, followed by the application of a protective dielectric layer (124) onto the field oxide (84, 86), source (118), drain (120), and gate (110). A resistive layer (180) is deposited on the dielectric layer (124) and directly connected to the source (118), drain (120), and gate (110). A conductive layer (181) is deposited on a portion of the resistive layer (180), ultimately forming both uncovered and covered regions (202, 204, 206) thereof. The uncovered region (202) functions as a heating resistor (209), and the covered regions (204, 206) function as electrical contacts to the transistor (126) and resistor (209).

    摘要翻译: 一种改进的热喷墨打印头,其具有并入其中的MOSFET驱动晶体管(126)。 每个MOSFET晶体管(126)的栅极(110)通过将二氧化硅层(72)施加到硅衬底(70)上,将氮化硅层(76)施加到二氧化硅上,并施加层 (90)的多晶硅到氮化硅上。 围绕栅极(110)的衬底(70)的部分被氧化,形成场氧化物区域(84,86)。 然后通常形成源区和漏区(118,120),随后在场氧化物(84,86),源极(118),漏极(120)和栅极(110)上施加保护电介质层(124) )。 电阻层(180)沉积在电介质层(124)上并直接连接到源极(118),漏极(120)和栅极(110)。 导电层(181)沉积在电阻层(180)的一部分上,最终形成其未覆盖区域和覆盖区域(202,204,206)。 未覆盖区域(202)用作加热电阻器(209),并且覆盖区域(204,206)用作与晶体管(126)和电阻器(209)的电接触。

    Combined rate/width modulation arrangement
    6.
    发明公开
    Combined rate/width modulation arrangement 失效
    Anordnung zur kombinierten Raten / Breiten-Modulation。

    公开(公告)号:EP0339922A2

    公开(公告)日:1989-11-02

    申请号:EP89304090.7

    申请日:1989-04-25

    IPC分类号: H03M1/82 H03M1/86

    CPC分类号: H03M1/68 H03M1/822 H03M1/86

    摘要: Pulse modulation circuitry which receives n binary data bits and generates a rate/width pulse modulated signal representing the binary value of the received data bits. The lower order m of the n bits generate a rate modulated signal having a number of pulses equal to the binary value of the m bits. The remainder of the n bits width modulate the rate modulated pulses. Each least significant bit increase in the binary value of the received date bits increases the width of a rate modulated pulse by a predetermined amount.

    摘要翻译: 脉冲调制电路,其接收n个二进制数据位,并产生表示接收到的数据位的二进制值的速率/宽度脉冲调制信号。 n位的低阶m产生具有等于m位的二进制值的脉冲数的速率调制信号。 n位宽度的其余部分调制速率调制脉冲。 接收日期位的二进制值中的每个最低有效位增加将速率调制脉冲的宽度增加预定量。

    Analog to digital converter with autoranging offset
    10.
    发明公开
    Analog to digital converter with autoranging offset 失效
    Analog / / Digitalwandler mit automatischer Offsetsbereichregelung。

    公开(公告)号:EP0571075A2

    公开(公告)日:1993-11-24

    申请号:EP93302544.7

    申请日:1993-03-31

    IPC分类号: H03M1/18 H03F3/00 G06G7/18

    摘要: In a mixed analog and digital integrated circuit for physiological signal instrumentation such as electrocardiographs, electromyographs, and electroencephalographs, an AD converter (346) adds an analog signal input (416) to an analog offset input to produce a digital signal output (724), and an offset means (736,740) generates the analog offset input if the digital output exceeds a threshold (1006,1008) for a predetermined number of A/D conversion. The integrated circuit has five signal channels, each with analog amplification and analog to digital conversion. The channels can be configured for various combinations of input signal amplification, input signal summation, analog output driving, and AC impedance measurement. The integrated circuit has two digital serial input lines and two digital serial output lines, all designed for direct connection to optical couplers. Channel configuration, gain, and other parameters are externally controllable by a serial digital input signal. Up to six compatible devices can be serially connected in a chain.

    摘要翻译: 在用于诸如心电图仪,肌电图和脑电图仪的生理信号仪器的混合模拟和数字集成电路中,AD转换器(346)将模拟信号输入(416)添加到模拟偏移输入以产生数字信号输出(724), 如果数字输出超过预定数量的A / D转换的阈值(1006,1008),则偏移装置(736,740)产生模拟偏移输入。 该集成电路有五个信号通道,每个通道具有模拟放大和模数转换。 通道可配置为输入信号放大,输入信号求和,模拟输出驱动和交流阻抗测量的各种组合。 集成电路具有两条数字串行输入线和两条数字串行输出线,全部设计用于直接连接光耦合器。 通道配置,增益和其他参数可通过串行数字输入信号进行外部控制。 多达六个兼容的设备可以串连在一起。