An arbitration system and method
    11.
    发明公开
    An arbitration system and method 失效
    仲裁系统和方法

    公开(公告)号:EP0549248A3

    公开(公告)日:1993-10-20

    申请号:EP92311481.3

    申请日:1992-12-16

    IPC分类号: G06F13/368

    CPC分类号: G06F13/368

    摘要: An improved arbitration system and method is disclosed for coupling a plurality of input nodes to a given output node, the system comprising: registering means attached to each input node for storing a queue of requests for the given output node; and an arbitration means comprising first arbitration logic for arbitrating between requests stored in a first location of each registering means, and for gating such requests to the given output node. The system is characterised in that: the arbitration means further comprises second arbitration logic for arbitrating between requests stored in a second location of each registering means; the second arbitration logic being responsive to the first arbitration logic such that the second arbitration logic gates such requests from the second locations to the given output node when the first arbitration logic has no requests to arbitrate.

    Apparatus and method for interconnecting a plurality of devices to a single node in a node-limited serial data bus computer network
    13.
    发明公开
    Apparatus and method for interconnecting a plurality of devices to a single node in a node-limited serial data bus computer network 失效
    用于将多个设备互连到节点有限的串行数据总线计算机网络中的单个节点的装置和方法

    公开(公告)号:EP0404602A3

    公开(公告)日:1991-10-16

    申请号:EP90306910.2

    申请日:1990-06-25

    IPC分类号: G06F13/40 G06F13/368

    CPC分类号: G06F13/368

    摘要: A distributor apparatus (10) and its method of operation for interconnecting a node of a bus (12) in a node-limited serial data bus computer network to a plurality of subnode devices. A transmission on the bus is routed through the distributor (10) to each subnode device (20a - 20n) connected thereto. A transmission (22a) from a subnode device is coupled to the bus through the distributor after the distributor selects one transmitting subnode device in the event that there are more than one subnode devices transmitting or requesting to transmit. Selection of one transmitting subnode device is carried out by rotating priority arbitration (54) that occurs during an idle timing interval or quiet slot such that bus timing parameters are obeyed.

    Method and apparatus for limiting the utilization of an asynchronous bus with distributed controlled access
    14.
    发明公开
    Method and apparatus for limiting the utilization of an asynchronous bus with distributed controlled access 失效
    用于与分布式访问控制限制异步总线的应用的方法和装置。

    公开(公告)号:EP0378070A2

    公开(公告)日:1990-07-18

    申请号:EP90100012.5

    申请日:1990-01-02

    IPC分类号: G06F13/368

    CPC分类号: G06F13/368

    摘要: A plurality of units which are coupled to transfer requests, transfer data over an asynchronous bus network during allocated bus transfer cycles. The network has a tie-breaking bus priority network which is distributed to a common interface portion of each of the plurality of units and grants bus cycles and resolves simultaneous requests on a priority basis. At least one unit includes bus saturation detection apparatus included within its common interface portion for monitoring bus activity over established intervals of time. The detection of the occurrence of at least one available cycle over the given interval of time signals that the bus network is not in a saturated state. When the indicator specifies that the bus network is saturated, the unit throttles down its operation by increasing the amount of time between issuing data requests. Throttling continues until the bus is no longer being saturated.

    摘要翻译: 的哪一个被耦合到传输请求,将在分配给总线的传输周期比传输数据到异步总线网络单元的多个。 该网络具有平局决胜总线优先级网络的所有被分配给各单位和授予总线周期,所述多个的一个共同的接口部分和解析在优先的基础上的同时请求。 至少一个单元包括被包括用于在一段规定的时间间隔监控总线活动其公共接口部分内总线饱和检测装置。 至少一个周期的可用的发生随时间推移的信号的给定区间的检测所做的总线网络不处于饱和状态。 当所述指示符指定没有总线网络饱和时,单元向下节流其操作通过增加发出数据请求之间的时间量。 节流继续,直到总线不再被饱和。

    Local area network for digital data processing system
    15.
    发明公开
    Local area network for digital data processing system 失效
    Lokales Netzwerkfürnumerische Datenverarbeitungssysteme。

    公开(公告)号:EP0374131A2

    公开(公告)日:1990-06-20

    申请号:EP90103117.9

    申请日:1985-05-24

    IPC分类号: G06F15/16 G06F13/368

    摘要: A local area network for interconnecting terminals and other users and data processing systems and other service providers over a communications link. The users and providers connect to the communications link by means of interface units each of which may connect to several users or providers. The interface units communicate over the communications link by means of messages. When a user requires the use of a service, the interface unit establishes a virtual circuit between it and the interface unit connected to the service provider and a service session which allows the user and the service provider to communicate over the virtual circuit. If several users connected to the one interface unit as the first user require services provided by providers which connected to the same interface unit as the first provider, they communicate in sessions over the same virtual circuits. The session messages are accumulated into single virtual circuit messages that are acknowledged in unison by the receiving interface unit. Each virtual circuit in the users' interface units includes a timer which reset when a message is transmitted over the virtual circuit and a data waiting flag set whenever data is present to be transitted over the virtual circuit. The interface units are inhibited from transmitting over a virtual circuit unless the timer has timed out and the data waiting flag is set.

    摘要翻译: 用于通过通信链路互连终端和其他用户以及数据处理系统和其他服务提供商的局域网。 用户和提供商通过接口单元连接到通信链路,每个接口单元可以连接到多个用户或提供商。 接口单元通过消息通过通信链路进行通信。 当用户需要使用服务时,接口单元在其与连接到服务提供商的接口单元之间建立虚拟电路,以及允许用户和服务提供商通过虚拟电路进行通信的服务会话。 如果作为第一用户连接到一个接口单元的多个用户需要连接到与第一提供商相同的接口单元的提供商提供的服务,则它们在相同虚拟电路上的会话中通信。 会话消息被累积到由接收接口单元一致确认的单个虚拟电路消息中。 用户接口单元中的每个虚拟电路包括当通过虚拟电路发送消息时复位的定时器以及当通过虚拟电路传输数据时设置的数据等待标志。 除非定时器超时并且设置了数据等待标志,否则接口单元被禁止通过虚拟电路传输。

    Channel number priority assignment apparatus.
    16.
    发明公开
    Channel number priority assignment apparatus. 失效
    Kanalprioritätsnummer-Zuweisungsvorrichtung。

    公开(公告)号:EP0206321A2

    公开(公告)日:1986-12-30

    申请号:EP86108614

    申请日:1986-06-24

    摘要: A data processing system has a system bus network which includes a distributed priority network for transferring data asynchronously between a number of subsystems which couple to the bus. Each subsystem includes priority logic circuits coupled to receive a group of priority signals from the priority network which establish when the subsystem has the highest priority of the requesting subsystems to access the bus. The number of subsystems include a plurality of identical subsystems, each of which has a channel number assignment apparatus. The apparatus of each identical subsystem is connected to receive the same of at least one of the group of priority signals. During the idle state of the system bus, the apparatus of each identical subsystem operates to store a unique state of the priority signal which is defined as a function of the subsystem's position on the bus thereby automatically establishing a unique channel number value for each identical subsystem.

    CURRENT SWITCH CONTROL DEVICE AND ELECTRONIC DEVICE
    19.
    发明公开
    CURRENT SWITCH CONTROL DEVICE AND ELECTRONIC DEVICE 有权
    控制装置电源开关和电子设备

    公开(公告)号:EP2781989A4

    公开(公告)日:2015-03-11

    申请号:EP13797799

    申请日:2013-05-23

    发明人: XU SHUNHAI

    IPC分类号: G06F1/26 G06F13/368 H02J7/00

    摘要: The present invention discloses a control device for current switching and an electronic device. The control device for current switching disclosed in embodiments of the present invention includes: a USB OTG interface for connecting to a device; a USB interface for connecting to the device; a booster current-limiting circuit connected between the USB OTG interface and the USB interface, where the booster current-limiting circuit, the USB OTG interface, and the USB interface form a line for the device to supply power to a device; and a measuring and controlling unit connected to the booster current-limiting circuit, where the measuring and controlling unit is configured to change, after a current switching request is received, a resistance value of a current-limiting circuit in the booster current-limiting circuit, so that the first device supplies a corresponding current to the second device. The control device for current switching and the electronic device disclosed in the embodiments of the present invention can improve universality of the control device for current switching.

    Verfahren und Vorrichtung zur Zuteilung eines PCI-Busses an mehrere Master zum Zugriff der Master auf Targets über den PCI-Bus
    20.
    发明公开
    Verfahren und Vorrichtung zur Zuteilung eines PCI-Busses an mehrere Master zum Zugriff der Master auf Targets über den PCI-Bus 审中-公开
    方法和装置,用于PCI总线的分配到多个主的经由PCI总线访问主到目标

    公开(公告)号:EP1276052A3

    公开(公告)日:2007-12-05

    申请号:EP02015267.4

    申请日:2002-07-09

    发明人: Runte, Markus

    IPC分类号: G06F13/368

    CPC分类号: G06F13/372

    摘要: Die Erfindung betrifft ein Verfahren und eine Vorrichtung zur Zuteilung eines PCI-Busses an mehrere Master für Zugriffe der Master über den PCI-Bus auf an den PCI-Bus angeschlossene Targets, wobei die Master über den PCI-Bus Lese- und Schreibaktionen auf die Targets durchführen. Das erfindungsgemäße Verfahren umfasst ein Standard-Arbitrierverfahren und ein Spezial-Arbitrierverfahren. In dem Standard-Arbitrierverfahren wird die Zuteilungsreihenfolge für eine Zuteilung des PCI-Busses entsprechend der jeweils für einen Master vorbestimmten Zuteilungspriorität festgelegt. Das Spezial-Arbitrierverfahren ersetzt das Standard-Arbitrierverfahren dann, wenn ein deterministischer Master, der einen Request auf Zuteilung des PCI-Busses gestellt hat, bis zum Ablauf einer vorbestimmten Zeitspanne den PCI-Bus nicht zugeteilt bekommen hat oder falls innerhalb des Zeitraums kein Datenaustausch zwischen dem deterministischen Master und dem adressierten Target erfolgte. In dem Spezial-Arbitrierverfahren wird dafür Sorge getragen, dass dieser deterministische Master in der Zuteilungsreihenfolge mit einer größeren Häufigkeit auftritt als im Standard-Arbitrierverfahren.