公开(公告)号：EP1801725A3

公开(公告)日：2007-07-11

申请号：EP06025969.4

申请日：2006-12-14

申请人： Nvidia Corporation

发明人： Cox, Michael B. ,  Langendorf, Brian Keith ,  Moreton, Henry Packard ,  Reed, David G.

IPC分类号： G06F21/02

CPC分类号： G06F21/602

摘要： A bridge is disclosed having a security engine. The bridge permits cryptographic services, such as encryption, decryption and transcoding, to be offloaded from a central processing unit to the bridge.

公开(公告)号：EP1797551A2

公开(公告)日：2007-06-20

申请号：EP05810243.5

申请日：2005-09-30

申请人： Nvidia Corporation

发明人： REHBOK, William, E.

IPC分类号： G09G5/08

CPC分类号： A63F13/22 ,  A63F13/08 ,  A63F13/92 ,  A63F2300/204 ,  A63F2300/406 ,  G06F3/0205 ,  G06F3/0235 ,  H04M1/233

摘要： An interface, apparatus, circuit and method for interfacing with an electronic device, such as a cellular telephone, are disclosed. The interface includes a key pad with a number of keys, each operable for providing a unique input to the electronic device, and an actuator for selectively actuating one or more of the keys. A controller, coupled to the key pad, scans the keys according to a mode of operation of the electronic device. A mode selector, operable with the controller, selects a first or second operating mode. In the first, useful for instance in performing telephonic functions, each key provides its unique input discretely. In the second mode, useful for instance for providing a game related function, certain of the keys are selectively chorded to function for providing their respective inputs together, effectively simultaneously, according to a manipulation of the actuator by the user.

公开(公告)号：EP1794850A2

公开(公告)日：2007-06-13

申请号：EP05785671.8

申请日：2005-08-10

申请人： Nvidia Corporation

发明人： JATOU, Ross, F. ,  SHU, Charlie, J.

IPC分类号： H01R13/648 ,  H01R12/20 ,  H01R13/66 ,  H01R12/16

CPC分类号： H01R12/712 ,  H01R13/6485 ,  H01R13/658 ,  H01R13/6658

摘要： An improved VGA connector that supports enhanced graphic performance by internally incorporating one or more functions of fusing, filtering, shielding, and the controlling of signal line impendances. The improved VGA connector is dimensionally interchangeable with many aspects of standard VGA connectors, and use standard pin-outs that mate with mating connectors. Integral DACs can be included to provide analog outputs.

公开(公告)号：EP1784021A2

公开(公告)日：2007-05-09

申请号：EP06022906.9

申请日：2006-11-03

申请人： Nvidia Corporation

发明人： Azar, Hassane S. ,  Diard, Franck R.

IPC分类号： H04N7/26 ,  G06F12/00 ,  H04N5/44

CPC分类号： H04N7/012 ,  G06F3/14 ,  G06T1/20 ,  G09G5/363 ,  G09G5/399 ,  G09G2360/06

摘要： One embodiment of a video processor includes a first media processing device coupled to a first memory and a second media processing device coupled to a second memory. The second media processing device is coupled to the first media processing device via a scalable bus. A software driver configures the media processing devices to provide video processing functionality. The scalable bus carries video data processed by the second media processing device to the first media processing device where the data is combined with video data processed by the first media processing device to produce a processed video frame. The first media processing device transmits the combined video data to a display device. Each media processing device is configured to process separate portions of the video data, thereby enabling the video processor to process video data more quickly than a single-GPU video processor.

摘要翻译： 视频处理器的一个实施例包括耦合到第一存储器的第一媒体处理设备和耦合到第二存储器的第二媒体处理设备。 第二媒体处理设备经由可伸缩总线耦合到第一媒体处理设备。 软件驱动程序配置媒体处理设备以提供视频处理功能。 可扩展总线将由第二媒体处理设备处理的视频数据传送到第一媒体处理设备，其中数据与由第一媒体处理设备处理的视频数据组合以产生经处理的视频帧。 第一媒体处理设备将组合的视频数据发送到显示设备。 每个媒体处理设备被配置为处理视频数据的分开的部分，从而使视频处理器比单GPU视频处理器更快地处理视频数据。

公开(公告)号：EP1750202A1

公开(公告)日：2007-02-07

申请号：EP06116988.4

申请日：2006-07-11

申请人： Nvidia Corporation

发明人： Tsu, William P. ,  Case, Colyn S. ,  Kaul, Ashish Kishen ,  Mandal, Manas

IPC分类号： G06F13/40

CPC分类号： G06F13/404 ,  Y02D10/14 ,  Y02D10/151

摘要： Multiple data transfer requests can be merged and transmitted as a single packet on a packetized bus such as a PCI Express (PCI-E) bus. In one embodiment, requests are combined if they are directed to contiguous address ranges in the same target device. An opportunistic merging procedure is advantageously used that merges a first request with a later request if the first request and the later request are mergeable and are received within a certain period of time; otherwise, requests can be transmitted without merging.

摘要翻译： 多个数据传输请求可以在诸如PCI Express（PCI-E）总线的分组化总线上合并并发送为单个数据包。 在一个实施例中，如果它们被引导到相同目标设备中的连续地址范围，则组合请求。 有利地使用机会合并程序，如果第一请求和后续请求可合并并且在一定时间段内被接收，则将第一请求与稍后的请求合并; 否则，可以在不合并的情况下传送请求。

公开(公告)号：EP1745557A2

公开(公告)日：2007-01-24

申请号：EP05747411.6

申请日：2005-05-10

申请人： NVIDIA Corporation

发明人： SCHEUERMANN, W. James

IPC分类号： H04B1/66 ,  H04N7/12

CPC分类号： H04N19/523 ,  H04N19/117 ,  H04N19/12 ,  H04N19/42 ,  H04N19/43 ,  H04N19/61

摘要： A video processor according to the invention is dynamically configurable as to the attributes of the video data upon which the processor operates. Some embodiments dynamically configure the processor via a sequence of instructions, where the instructions include information on the attributes of the current video data. Some embodiments include a dynamically configurable adder array that computes difference functions thereby generating error vectors. Some embodiments include a dynamically configurable adder array that computes filtering functions applied to the video data, e.g. interpolation or decimation of the incoming video prior to motion detection. Some embodiments of the invention provide dynamically configurable hardware searches, for example, for detecting motion. Some embodiments of the invention are implemented using an adaptive computing machines (ACMs). An ACM includes a plurality of heterogeneous computational elements, each coupled to an interconnection network.

公开(公告)号：EP1739560A2

公开(公告)日：2007-01-03

申请号：EP06012909.5

申请日：2006-06-22

申请人： Nvidia Corporation

发明人： Aguaviva, Raul

IPC分类号： G06F12/08

CPC分类号： G06F12/0866 ,  G06F2212/313 ,  G09G5/001 ,  G09G5/363 ,  G09G5/39

摘要： A computer system utilizes subsystem supplemental memory resources to implement operating system supplemental disk caching. A main system processor (e.g., a central processing unit) processes information associated with main system functions. A bulk memory (e.g., a hard disk) stores the information. A main system memory (e.g., a main RAM) caches portions of the bulk information. A subsystem supplemental memory (e.g., a graphics subsystem RAM) provides storage capacity for subsystem operations (e.g., graphics operations) and supplemental storage for portions of said bulk information associated with main system functions (e.g., functions performed by the main system processor). Information (e.g., main system information) cached in the subsystem supplemental memory can be accessed by the main system processor directly.

摘要翻译： 计算机系统利用子系统补充存储器资源来实现操作系统补充磁盘缓存。 主系统处理器（例如，中央处理单元）处理与主系统功能相关联的信息。 批量存储器（例如，硬盘）存储信息。 主系统存储器（例如，主RAM）高速缓存批量信息的部分。 子系统补充存储器（例如，图形子系统RAM）为与主系统功能（例如，由主系统处理器执行的功能）相关联的所述批量信息的部分提供用于子系统操作（例如，图形操作）的存储容量和补充存储。 缓存在子系统补充存储器中的信息（例如，主系统信息）可以由主系统处理器直接访问。

公开(公告)号：EP1708089A2

公开(公告)日：2006-10-04

申请号：EP06006271.8

申请日：2006-03-27

申请人： NVIDIA Corporation

发明人： Danilak, Radoslav

IPC分类号： G06F12/00

CPC分类号： G06F13/385 ,  G06F3/0607 ,  G06F3/0661 ,  G06F3/0689

摘要： One embodiment of the present invention provides a universal storage bus adaptor that can interface a host computer's bus to any of multiple types of storage devices. The universal serial bus adaptor provides transport layer functionality in such a way that a separate transport layer does not have to be provided for each type of storage device. Anther embodiment of the present invention includes a file management system (or storage stack) that has a read/write chimney configured to enable a READ/WRITE operation to bypass the exception processing and management functionalities of the file management system. Bypassing these functionalities increases the processing efficiency of READ/WRITE operations.

摘要翻译： 本发明的一个实施例提供了一种通用存储总线适配器，其可以将主计算机的总线连接到多种类型的存储设备中的任何一种。 通用串行总线适配器提供传输层功能，使得不必为每种类型的存储设备提供单独的传输层。 本发明的另一个实施例包括具有读/写烟囱的文件管理系统（或存储堆栈），该读/写烟囱被配置为使得读/写操作能够绕过文件管理系统的异常处理和管理功能。 绕过这些功能可以提高读/写操作的处理效率。

公开(公告)号：EP1549073A3

公开(公告)日：2005-09-14

申请号：EP04027310.4

申请日：2004-11-17

申请人： NVIDIA Corporation

发明人： Prabhakar, Ram ,  Reddy, Harikrishna M. ,  Zhong, Lefan ,  Sun, Wei ,  Vainsencher, Leonardo ,  Vaduganathan, Visalakshi

IPC分类号： H04N7/24

CPC分类号： H04N19/103 ,  H04N19/129 ,  H04N19/136 ,  H04N19/152 ,  H04N19/159 ,  H04N19/176 ,  H04N19/42 ,  H04N19/48 ,  H04N19/593 ,  H04N19/61 ,  H04N19/89

摘要： A dynamic AC prediction technique is implemented in a data partition mode which automatically disables AC prediction for encoding the current macroblock in the next packet when packet overflow occurs. Otherwise, when there is no overflow, AC prediction remains enabled to maintain compression efficiency. More particularly, in the preferred embodiment, a determination is first made whether a macroblock causes a packet overflow if it is encoded in the current packet. If so, a new packet is initiated into which the macroblock is encoded without AC prediction as the first macroblock. Otherwise, the macroblock with AC prediction remains in the current packet and a new macroblock is encoded.

公开(公告)号：EP1538519A2

公开(公告)日：2005-06-08

申请号：EP04028611.4

申请日：2004-12-02

申请人： NVIDIA Corporation

发明人： Zhu, Qiming

IPC分类号： G06F3/06

CPC分类号： G06F3/0607 ,  G06F3/0632 ,  G06F3/0689

摘要： A RAID class driver model enables users to easily combine two or more disks into a bootable RAID system without specialized disk controllers and allows the creation of RAID systems using disks of different types, controllers, and interfaces. A RAID class driver is initialized in response to the identification of a RAID controller. Disk controllers return RAID-specific device identifications, rather than a standard disk device identifications, for each disk to be included in the RAID system. The RAID class driver binds a RAID-specific functional interface to each disk having a RAID-specific device identification and combines the disks into a disk object representing the entire RAID system. The disk object provides the operating system with a standard disk device identification. The operating system loads a standard disk driver to interface with the disk object, thereby enabling transparent access to the RAID system.

摘要翻译： RAID类驱动程序模型使用户能够轻松地将两个或更多磁盘组合成可引导的RAID系统，而无需专门的磁盘控制器，并允许使用不同类型，控制器和接口的磁盘创建RAID系统。 响应识别RAID控制器，初始化RAID类驱动程序。 磁盘控制器返回RAID特定的设备标识，而不是标准的磁盘设备标识，用于每个磁盘包含在RAID系统中。 RAID类驱动程序将RAID特定功能接口绑定到具有RAID特定设备标识的每个磁盘，并将这些磁盘组合成代表整个RAID系统的磁盘对象。 磁盘对象为操作系统提供标准磁盘设备标识。 操作系统加载一个标准的磁盘驱动程序来与磁盘对象连接，从而实现对RAID系统的透明访问。