公开(公告)号：EP0971286A3

公开(公告)日：2006-09-06

申请号：EP99112984.2

申请日：1999-07-05

申请人： Hitachi, Ltd.

发明人： Yamamoto, Akira

IPC分类号： G06F3/06

CPC分类号： G06F3/0626 ,  G06F3/0661 ,  G06F3/0689 ,  G11B20/1252

摘要： A processor of a mainframe host is provided with a variable length/fixed length format conversion function, and furthermore, provided with a function capable of connecting with a disk array provided outside a frame of the mainframe host by a fixed length interface. As a result, data to which the mainframe host, a UNIX server, and a PC server separately access can be commonly stored into the disk array equipped with the fixed length format interface. An interface for connecting a mainframe unit to an open system, is made identical to another interface for connecting a disk array which commonly stores thereinto data accessed by, for example, a UNIX server and a PC server, to both the mainframe host and the open system. As a result, a management step number of the computer system can be reduced, and the computer system can be easily utilized.

摘要翻译： 大型机主机的处理器具有可变长度/固定长度格式转换功能，并且还具有能够通过固定长度接口与设置在主机主机的帧外部的盘阵列进行连接的功能。 因此，大型机主机，UNIX服务器和PC服务器分开访问的数据可以通常存储在配备固定长度格式接口的磁盘阵列中。 用于将主机单元连接到开放系统的接口与用于连接磁盘阵列的另一接口相同，该磁盘阵列通常将例如UNIX服务器和PC服务器存储的数据存储到大型机主机和打开的主机 系统。 结果，可以减少计算机系统的管理步骤号，并且可以容易地利用计算机系统。

公开(公告)号：EP0671691B1

公开(公告)日：2006-08-23

申请号：EP95101369.7

申请日：1995-02-01

申请人： Hitachi, Ltd.

发明人： Satoh, Takao ,  Takeuchi, Hisaharu ,  Inoue, Yasuo ,  Yamamoto, Akira

IPC分类号： G06F13/12 ,  G06F13/38 ,  G06F11/34

CPC分类号： G06F13/124 ,  G06F11/3409 ,  G06F11/349 ,  G06F2201/88 ,  G06F2201/885

摘要： A storage controller (2; 2a) comprising a storage device adapter (22; 522), a channel adapter (21a, 21b; 521a, 521b), a cache memory (24), a control memory (23), and a plurality of buses (26, 27; 56-58) connecting therebetween. The channel adapter communicates with a processor (1) and processes input/output requests issued by the processor. The storage device adapter controls a storage device (3) and data transfer between the storage device and the cache memory. The channel adapter and the storage device adapter exchanges control information via the control memory. The buses are used to transfer the data and the control information between the cache memory and the control memory, and the channel adapter and the storage device adapter. The controller also comprises bus load estimating means and bus mode selecting means. The bus load estimating means (201, 202) estimates bus load characteristics as an index based on the amount of data transfer during sequential access to the storage device. The bus mode selecting means (203) determines a bus mode of bus utilization based on the index. Each of the channel adapter and the storage device adapter has bus access means for accessing the buses in accordance with the bus mode selected by the bus mode selecting means.

公开(公告)号：EP0844561B1

公开(公告)日：2006-03-08

申请号：EP97120114.0

申请日：1997-11-17

申请人： Hitachi, Ltd.

发明人： Katsuragi, Eiju ,  Ogata, Mikito ,  Kurano, Akira ,  Tamiya, Toshihiko ,  Yamamoto, Akira ,  Takahashi, Naoya

IPC分类号： G06F11/10

CPC分类号： G06F11/1076 ,  G06F2211/1054 ,  G06F2211/1066

公开(公告)号：EP1186988A2

公开(公告)日：2002-03-13

申请号：EP01124527.1

申请日：1994-11-17

申请人： Hitachi, Ltd.

发明人： Arai, Kouji ,  Satoh, Takao ,  Yamamoto, Akira

IPC分类号： G06F3/06 ,  G06F11/10

CPC分类号： G06F11/1096 ,  G06F3/0601 ,  G06F3/0607 ,  G06F3/0613 ,  G06F3/0632 ,  G06F3/0658 ,  G06F3/0689 ,  G06F2003/0697

摘要： A storage unit system includes a control apparatus (1010) having a unit for reading memory data from a plurality of storage units (1021 to 1024) before increase into a memory (1012) of the control apparatus, a preparing unit for preparing parity data newly from the memory data read in the memory, a rearrangement unit for dispersing transfer data from a processor (1001) read in the memory and the newly prepared parity data to be written into a plurality of storage units (1021 to 1025) after the increase to perform arrangement of data, a memory unit (1035) for storing a write position on the way of the rearrangement of data, a comparison unit for comparing an access position for an access request from the processor with the write position, and a determining unit for determining a data dispersed pattern used in a data access from the processor on the basis of a comparison result of the comparison means, whereby the storage unit can be increased individually with a unit of one storage unit and dynamically without stop of the system.

摘要翻译： 存储单元系统包括控制装置（1010），该控制装置具有用于在增加到控制装置的存储器（1012）之前从多个存储单元（1021至1024）读取存储器数据的单元，用于新建奇偶校验数据的准备单元 从存储器中读取的存储器数据中，将从存储器中读取的处理器（1001）的传输数据分散的重新排列单元以及在将其写入多个存储单元（1021至1025）之后将新写入的奇偶校验数据写入多个存储单元（1021至1025） 执行数据的配置，存储单元（1035），用于存储数据重新排列的写入位置;比较单元，用于将来自处理器的访问请求的访问位置与写入位置进行比较;以及确定单元， 基于比较装置的比较结果，确定从处理器进行的数据访问中使用的数据分散模式，由此可以以一个存储单元为单位增加存储单元 并动态地不停止系统。

公开(公告)号：EP0478006B1

公开(公告)日：1999-05-12

申请号：EP91120314.9

申请日：1985-08-08

申请人： HITACHI, LTD. ,  Tanaka, Yuzuru

发明人： Tanaka, Yuzuru ,  Yamamoto, Akira ,  Tsuchida, Masashi

IPC分类号： G06F17/30

CPC分类号： G06F17/30985 ,  G06F7/36 ,  G06F15/7896 ,  Y10S707/99937

公开(公告)号：EP0869438A2

公开(公告)日：1998-10-07

申请号：EP98105864.7

申请日：1998-03-31

申请人： Hitachi, Ltd.

发明人： Fukuzawa, Yasuko ,  Yamamoto, Akira ,  Nakano, Toshio

IPC分类号： G06F11/14

CPC分类号： G06F3/065 ,  G06F3/0623 ,  G06F3/0685 ,  G06F11/1456

摘要： A heterogeneous computer system, a heterogeneous input/output system and a data back-up method for the systems. An I/O subsystem A (113, 114) for open system and an I/O subsystem B (104, 105) for a mainframe are connected by a communication unit. In order to back up the data from at least a disk connected to the I/O subsystem B in a MT library system and in order to permit the mainframe to access the data in the I/O subsystem B, the I/O subsystem A includes a table (314, 315) for assigning a vacant memory address in a local subsystem to the memory of the I/O subsystem for an open system. A request of variable-length record format received from the mainframe is converted into a fixed-length record format for the subsystem B. The disk designated according to the table is accessed, and the data thus obtained is sent to the mainframe and backed up in the back-up system.

摘要翻译： 异构计算机系统，异构输入/输出系统和系统的数据备份方法。 用于开放系统的I / O子系统A（113,114）和用于主机的I / O子系统B（104,105）通过通信单元连接。 为了从MT库系统中至少连接到I / O子系统B的磁盘备份数据，为了允许主机访问I / O子系统B中的数据，I / O子系统A 包括用于将本地子系统中的空闲存储器地址分配给用于开放系统的I / O子系统的存储器的表（314,315）。 从大型机接收到的可变长度记录格式的请求被转换为子系统B的固定长度记录格式。访问根据该表指定的磁盘，并将所获得的数据发送到主机并备份 备份系统。

公开(公告)号：EP0844561A2

公开(公告)日：1998-05-27

申请号：EP97120114.0

申请日：1997-11-17

申请人： Hitachi, Ltd.

发明人： Katsuragi, Eiju ,  Ogata, Mikito ,  Kurano, Akira ,  Tamiya, Toshihiko ,  Yamamoto, Akira ,  Takahashi, Naoya

IPC分类号： G06F11/10 ,  G11B20/18

CPC分类号： G06F11/1076 ,  G06F2211/1054 ,  G06F2211/1066

摘要： The disk array device includes a disk control device (20) connected to a central processing unit (10) and a plurality of disk drives (300) composing disk arrays under the control of said disk control device (20). The disk control device (20) includes a redundant data generator (130), a difference data generator (140), and a redundant data generation method selecting function (37). The disk array device selects a proper redundant data generating method from a method of read and modify and a method of all stripes, both of which are executed to generate redundant data by the disk control device (20) according to an access pattern from a host, a load state of the disk drive (300), and a failure, and a method of a generation in a drive and a method of difference, both of which are executed to generate the redundant data on the disk drive (300) for saving the redundant data, for the purpose of reducing an overhead accompanied with generation of the redundant data and improving reliability of generating the redundant data.

摘要翻译： 磁盘阵列装置包括在所述盘控制装置（20）的控制下连接到中央处理单元（10）的盘控制装置（20）和组成盘阵列的多个盘驱动器（300）。 盘控制装置（20）包括冗余数据生成器（130），差数据生成器（140）和冗余数据生成方法选择功能（37）。 磁盘阵列设备从读取和修改方法中选择适当的冗余数据生成方法以及所有条带的方法，两者都被执行以由磁盘控制设备（20）根据来自主机的访问模式生成冗余数据 ，磁盘驱动器（300）的加载状态和故障，以及驱动器中的生成方法和差异方法，两者都被执行以在磁盘驱动器（300）上生成用于保存的冗余数据 冗余数据，用于减少伴随着冗余数据生成的开销，并提高生成冗余数据的可靠性。

公开(公告)号：EP0785500A1

公开(公告)日：1997-07-23

申请号：EP96120639.8

申请日：1996-12-20

申请人： HITACHI, LTD.

发明人： Kanda, Motohiro ,  Yamamoto, Akira ,  Nakano, Toshio ,  Yoshida, Minoru

IPC分类号： G06F3/06

CPC分类号： G06F3/0601 ,  G06F3/0607 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0661 ,  G06F3/067 ,  G06F3/0674 ,  G06F3/0676 ,  G06F3/0689 ,  G06F2003/0697

摘要： In a computer system including a disk subsystem (80) having channel interface (71) compatible to a count-key-data format and a SCSI interface (61) compatible to a fixed length data format, the disk subsystem (80) is connected to a CPU (10) controlled by an open system operating system (40) through the SCSI interface (61), and connected to an other CPU (11) controlled by a main frame operating system (50) through the channel interface (71). The CPU (10) is provided with a CKD record access library (35) and a VSAM access library (30) which accesses in a FBA format the VSAM record stored by the other CPU (11) in a CKD format in the disk subsystem (80) and allows the access by an application program (20) of the CPU (10) as a VSAM record based on VSAM control information.

摘要翻译： 在包括具有与计数密钥数据格式兼容的通道接口（71）的磁盘子系统（80）和与固定长度数据格式兼容的SCSI接口（61）的计算机系统中，磁盘子系统（80）连接到 通过SCSI接口（61）由开放系统操作系统（40）控制的CPU（10），并且通过通道接口（71）连接到由主框架操作系统（50）控制的另一CPU（11）。 CPU（10）设置有CKD记录访问库（35）和VSAM访问库（30），其以FBA格式访问由另一个CPU（11）以磁盘子系统中的CKD格式存储的VSAM记录（ 80），并且允许基于VSAM控制信息的CPU（10）的应用程序（20）作为VSAM记录进行访问。

公开(公告)号：EP0671691A3

公开(公告)日：1996-12-04

申请号：EP95101369.7

申请日：1995-02-01

申请人： HITACHI, LTD.

发明人： Satoh, Takao ,  Takeuchi, Hisaharu ,  Inoue, Yasuo ,  Yamamoto, Akira

IPC分类号： G06F13/12 ,  G06F13/38

CPC分类号： G06F13/124 ,  G06F11/3409 ,  G06F11/349 ,  G06F2201/88 ,  G06F2201/885

摘要： A storage controller (2; 2a) comprising a storage device adapter (22; 522), a channel adapter (21a, 21b; 521a, 521b), a cache memory (24), a control memory (23), and a plurality of buses (26, 27; 56-58) connecting therebetween. The channel adapter communicates with a processor (1) and processes input/output requests issued by the processor. The storage device adapter controls a storage device (3) and data transfer between the storage device and the cache memory. The channel adapter and the storage device adapter exchanges control information via the control memory. The buses are used to transfer the data and the control information between the cache memory and the control memory, and the channel adapter and the storage device adapter. The controller also comprises bus load estimating means and bus mode selecting means. The bus load estimating means (201, 202) estimates bus load characteristics as an index based on the amount of data transfer during sequential access to the storage device. The bus mode selecting means (203) determines a bus mode of bus utilization based on the index. Each of the channel adapter and the storage device adapter has bus access means for accessing the buses in accordance with the bus mode selected by the bus mode selecting means.

公开(公告)号：EP0656588A3

公开(公告)日：1995-07-26

申请号：EP94118794.0

申请日：1994-11-29

申请人： HITACHI, LTD.

发明人： Kanda, Motohiro ,  Satoh, Takao ,  Yamamoto, Akira

IPC分类号： G06F11/14

CPC分类号： G06F3/0601 ,  G06F2003/0697

摘要： In a storage device (30), a dump process can be conducted without any intervention of a CPU, and dump objective data at a dump start point can be completely dumped even when a data update is conducted during a period of time from the dump start point to a dump end point. A disk device with dump function (30) transfers data from a data not-updated region of a magnetic disk (100) to a disk device (31) as a dump destination in a predetermined sequence. In a case where a data update request is received during a period of time from the dump start point to the dump end point, when an area of the write data is other than the data not-updated region, the write data is written on the magnetic disk (100). When the area is in the data not-updated region, a before image block thereof is saved in the buffer (70) and then the write data is written on the magnetic disk (100). Thereafter, at an earlier one of the opportunity to transfer the pertinent data to the dump destination disk device (31) when the quantity of data saved in the buffer (70) exceeds a predetermined value or the opportunity to transfer the data thereto when an update request for the data is not done, the data saved in the buffer (70) is transferred to the dump destination disk device (31).

摘要翻译： 在存储装置（30）中，不需要CPU的干涉就能够进行转储处理，即使在从转储开始的时间段内进行数据更新的情况下，也能够将转储开始点的转储目标数据完全转储 指向转储结束点。 具有转储功能的盘装置（30）以预定顺序将数据从磁盘（100）的数据未更新区域传输到作为转储目的地的盘装置（31）。 在从转储开始点到转储结束点的时间段内接收到数据更新请求的情况下，当写入数据的区域不是数据未更新区域时，写入数据被写入 磁盘（100）。 当区域处于数据未更新区域时，其前图像块被保存在缓冲器（70）中，然后写入数据被写入磁盘（100）。 之后，当存储在缓冲器（70）中的数据量超过预定值时或者在更新时向其传送数据的机会时，在较早的机会中将相关数据传送到转储目标盘装置（31） 没有完成对数据的请求，保存在缓冲器（70）中的数据被传送到转储目标盘装置（31）。