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公开(公告)号：EP0947103A1
公开(公告)日：1999-10-06
申请号：EP97950936.0
申请日：1997-12-15
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： An MPEG decoder (14, 18, 22) in a high definition television receiver decodes and decompresses MPEG coded data to produce decompressed image pixel blocks, and includes a motion compensation network (90...) coupled to a frame memory (60) to produce finally decoded pixel data for display. The decompressed MPEG data is recompressed by plural parallel recompressors (40, 42) prior to storage in frame memory. Each recompressor receives a datastream of interleaved pixel data (24, 27, Fig. 5), and predicts and compresses interleaved pixel values (a, c) during each clock cycle, respectively (Fig. 20, 27). One of the recompressors (42) is de-energized in a reduced data processing mode when pixel data is subsampled (36, 38) prior to recompression. Subsampled data is re-ordered (43) prior to recompression. Multiple parallel decompressors (80, 82, 84) coupled to the frame memory provide pixel data to the motion processing network. A control unit (356, 360, 364, Fig. 23) insures an uninterrupted interleaved data flow to the decompressors by repeating last valid data when source data is interrupted.
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22.发明公开
公开(公告)号：EP0945026A1
公开(公告)日：1999-09-29
申请号：EP97953159.0
申请日：1997-12-08
CPC分类号： H04N19/428 , H04N19/13 , H04N19/423 , H04N19/593 , H04N19/60 , H04N19/61 , H04N19/91
摘要： A television receiver includes an MPEG decoder/decompressor (62-66) for providing decoded/decompressed pixel blocks. Decoded/decompressed pixels are recompressed prior to storage in frame memory (14). In the recompression process a reference first pixel is compressed as a function of a pixel block parameter. A reconstructed reference pixel value is used in a prediction network when reconstructing remaining pixels of the pixel block prior to display. A first pixel processor accurately compresses a reference pixel which prevents the propagation of a prediction error throughout the reconstructed block.
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公开(公告)号：EP0945022A1
公开(公告)日：1999-09-29
申请号：EP97944547.0
申请日：1997-09-30
CPC分类号： H03M7/40 , G06T9/007 , H04N5/4401 , H04N5/46 , H04N11/044 , H04N19/13 , H04N19/186 , H04N19/40 , H04N19/42 , H04N19/423 , H04N19/428 , H04N19/436 , H04N19/439 , H04N19/59 , H04N19/60 , H04N19/61 , H04N19/895 , H04N19/90 , H04N19/91 , H04N21/4305
摘要： Compression and decompression apparatus and methods for producing fixed-length compressed data blocks with variable-length compression are described. The compression system receives and N-bit word from a data block (60) and determines the variable compression length for the word (62). A bit counter keeps track of the number of bits remaining (64) and determines if sufficient bits have been used to ensure that the fixed-length compressed data block will be filled (66). If so, the compressed word is output (70). If not, prior to output the compressed word is padded with an appropriate number of bits (68), which may be null bits.
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公开(公告)号：EP0685142A1
公开(公告)日：1995-12-06
申请号：EP93905999.0
申请日：1993-02-17
CPC分类号： H04N7/0122 , H04N3/223
摘要： A video display system, comprises a video display having a first format display ratio. A picture height circuit (1010) determines an active picture height from an input video signal having a second format display ratio. A detector circuit (1030) identifies letterbox formats responsive to the active picture height in the signal and determines a format display ratio of the letterbox picture. A zoom circuit (1032) is operable in a first mode for enlarging the picture in size to fill the display substantially entirely, and operable in a second mode for enlarging the picture in size to substantially fill the display vertically. A vertical pan circuit (1034) centers the picture. The detector can identify the format display ratio of the letterbox format picture. A deflection system (50) is controllable in vertical size by a variable vertical scan rate, in horizontal size by variable horizontal expansion and compression, and in pan position by varying the vertical reset in phase.
摘要翻译： 视频显示系统包括具有第一格式显示比率的视频显示器。 图像高度电路（1010）从具有第二格式显示比率的输入视频信号中确定有效图像高度。 检测器电路（1030）响应于信号中的活动图像高度识别信箱格式并确定信箱图像的格式显示比率。 变焦电路（1032）可在第一模式下操作，用于放大该图片的大小以基本上完全填满显示器，并且可在第二模式下操作，用于放大该图片的大小以垂直地充满显示器。 垂直平移电路（1034）将图片居中。 检测器可以识别信箱格式图像的格式显示比率。 偏转系统（50）的垂直尺寸可通过可变的垂直扫描速率，水平尺寸的可变水平扩展和压缩以及通过改变相位的垂直复位的水平位置来控制。
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