摘要:
Zur digitalen Synchronisierung des als phasenverriegelte Schleife ausgebildeten Farbhilfsträger-Oszillators (VCO) mit der im FBAS-Signal (F) enthaltenen Burst-Schwingung (B) sind die entsprechenden digitalen Teilschaltungen (AD, DC) vorgesehen. Während des Key-Pulses (K) werden das digitale Rot-Farbdifferenzsignal (R-Y) und das digitale Blau-Farb-differenzsignal (B-Y) zeilenweise akkumuliert (A1, PS1, A2, PS3), dann der entsprechende (R-Y)-Wert mit einem Sollphasen-Wert oder Tint-Control-Wert addiert (A3), und für Phasenabweichungen von der Burst-Phase zwischen +90° und -90° nach gegebenenfalls erforderlicher Begrenzung (BG) einem Digital-Analog-Wandler (DA) zugeführt und nach entsprechender Tiefpaßfilterung (TP) zur Spannungssteuerung des Farbhilfsträger-Oszillators (VCO) benutzt. Wenn die Phasenabweichungen zwischen +90° und +180° oder -90° und -180° liegen, wird dagegen dem Digital-Analog-Wandler (DA) dauernd der obere bzw. untere Begrenzungswert mittels einer Schaltstufe (SS) zugeführt. Sie hat drei Schaltstellungen für das erwähnte direkte Durchschalten und die beiden Begrenzungswerte, wobei das Vorzeichen-Bit des akkumulierten (R-Y)-Werts bzw. des (B-Y)-Werts die entsprechende Auswahl bewirkt.
摘要:
Chrominance signals of a digitized composite video signal are processed by including automatic phase control and automatic chroma control operations that use circuit elements that are concurrently available for both operations as well as for other signal processing operations. The automatic phase control operation calculates a phase error corresponding to a phase difference between a reference clock signal and a burst synchronization signal of the chrominance signal. The reference clock signal is generated in response to the phase error data, such that the phase error is minimized and the reference clock signal coincides with the burst synchronization signal. The automatic chroma control operation multiplies the chrominance signal by coefficient data corresponding to the difference between the chrominance signal and a reference value to generate a constant level chrominance signal.
摘要:
Bei einer Schaltungsanordnung zum Erkennen eines Videosignals ist eine zeilenfrequent abgestimmte Stufe, welcher das Videosignal zuführbar ist, ein Integrationsglied und ein Schwellwertschalter vorgesehen. Dabei kann die zeilenfrequent abgestimmte Stufe eine Resonanzschaltstufe oder eine PLL-Schaltung mit einem Zeilenoszillator sein.
摘要:
A color synchronizing circuit (120) of a color television receiver comprises a PLL circuit comprising a phase detector circuit (12b), an LPF (12c), a VCO (12d) and a 1/4 frequency divider (12f). Color bursts extracted from a composite chrominance signal by a burst gate circuit (12a) are directly applied to an input of the PLL circuit through an adder (12g) in a burst period while being circulated through a loop including a delay circuit (12h) by a switch (12i). The delay circuit has a delay time which is equal to a period of the back porch of a horizontal synchronizing signal having the color burst inserted thereinto and is equal to integer multiples of a cycle of a chrominance subcarrier. Thus, the repetition frequency of the color burst sequentially supplied to the PLL circuit while being circulated through the above described loop becomes 16 times a horizontal frequency f H . As a result, the sidebands which appear at the intervals of f H in the frequency spectrum of the color bursts is decreased, so that the capture range of the PLL circuit becomes wide.
摘要:
A system for regenerating a standard-length color burst signal from a less-than-standard-length color burst information signal of a given frequency and phase. The system includes a phase-locked loop (20) for generating a system clock signal(46) from the color burst information signal (42), with the clock signal having a clock frequency related to and at least twice the given frequency of the color burst information signal. The phase information from the color burst information signal is sampled and stored in a RAM (26). The sampling is clocked by the system clock signal. A standard-length color burst signal (58) is regenerated at the given frequency and in phase with the color burst information signal by retrieving the stored phase information and extrapolating the standard-length signal in accordance with the retrieved phase information. Such retrieval is clocked by the system signal. The phase-locked loop is a digital phase-locked loop; and the color burst information signal is converted into a digital color burst information signal for processing by the phase-locked loop and for sampling and retrieval of the phase information. Upon retrieval and extrapolation of the phase information samples, the retrieved and extrapolated phase information samples (54) are converted into an analog sample information signal (56), which is converted into a regenerated sinusoidal standard-length color burst signal (58) by a low pass filter (34).