Abstract:
A PCM tape recording and reproducing apparatus for recording and reproducing an audio signal by using multi- track heads, comprises a frame interleaving device with a high dropout immunity function. The frame interleaving device comprises a distributor (10) for successively distributing continuous interleaved input data between tracks, within a multiplicity of tracks formed by splitting a magnetic tape, at a spacing of at least one track so that said continuous interleaved input data will not be shared between two continuous tracks in the same recording and reproducing direction, a data framing circuit (12) for forming a frame out of data to be distributed to each of said tracks and for applying said frame with a synchronization signal (2) at the top of said frame and with an error detection code (4) at the end of said frame, and a delay circuit (16, 20) for delaying data associated with a track by one frame or more with respect to data associated with a neighboring track in the same recording and reproducing as said track.
Abstract:
A method for transmitting time-sharing multidata in which data series of a plurality of channels are time-sharing multiplexed to form a transmitting data series having the steps of adding an error detecting or error correcting redundant bit and a synchronizing redundant bit to an information bit of a predetermined number contained in the respective data series of said channels to form one transmitting unit, forming bit groups in a manner as to take each bit as one group which is corresponding to each other between the channels with respect to the information bit, the error detecting or error correcting redundant bit and the synchronizing redundant bit of said one transmitting unit of each of said channels, time-sharing multiplexing the data series so as to form one frame in which these bit groups are sequentially continued to each other and using a bit pattern of the bit groups in the synchronizing redundant bit as a frame synchronizing signal of the transmitting data series.
Abstract:
An encoder (12) is disclosed for generating a cyclically encoded n-bit channel word from an incoming k-bit data word, the encoder comprising generator word and data word shift registers (4100 and 4200), input and buffer shift registers (4300 and 4400 to 4800) and gating and clocking means. For the encoder to function properly when the number of parity bits is small, one of the buffer registers is partitioned into segments (4600, 4700, 4800) which have predetermined lengths (FIG. 4). A complementary decoder (20) is also described.