摘要:
A television receiver is controlled as to the degree of vertical zoom via a deflection current ramp that varies in slope and which may be delayed to achieve panning. Due to the increased slope when zoomed, the deflection current and the electron beam complete a trace in less time than the normal vertical interval. The deflection current is maintained at one extreme or the other outside the trace interval, and the beam is blanked. A retrace signal generator (10a, C17, U07) coupled in a feedback (IERROR) loop with the power supply for the deflection circuit determines the midpoint of the blanking period and generates a fast retrace (VRESET) at or near the midpoint. The feedback loop is arranged to minimize the DC average current in the deflection winding by having a current source responsive to the DC average current for charging a timing ramp (C17) that triggers retrace upon reaching a threshold. The slope of the timing ramp varies with DC loading, thus advancing or retarding retrace to center retrace in the blanking interval.
摘要:
A television receiver is controlled as to the degree of vertical zoom via a deflection current ramp that varies in slope and which may be delayed to achieve panning. Due to the increased slope when zoomed, the deflection current and the electron beam complete a trace in less time than the normal vertical interval. The deflection current is maintained at one extreme or the other outside the trace interval, and the beam is blanked. A retrace signal generator (10a, C17, U07) coupled in a feedback (IERROR) loop with the power supply for the deflection circuit determines the midpoint of the blanking period and generates a fast retrace (VRESET) at or near the midpoint. The feedback loop is arranged to minimize the DC average current in the deflection winding by having a current source responsive to the DC average current for charging a timing ramp (C17) that triggers retrace upon reaching a threshold. The slope of the timing ramp varies with DC loading, thus advancing or retarding retrace to center retrace in the blanking interval.
摘要:
A first voltage-to-current converter (Q07,U06A) responsive to a picture height adjustment control signal (V-SIZE) generates a first current (IURAMP) in a capacitor (C03) for producing a trace portion of a sawtooth signal (VSAW) in the capacitor having a rate of change that is adjustable in accordance with an adjustment of the control signal. A second voltage-to-current converter (Q09,U02A) responsive to the control signal generates a second current (I0) in a resistor (R09) for producing a third signal (base voltage of U01C) that is adjustable in accordance with the control signal. The sawtooth and third signals are coupled via a differential amplifier (U01B,U01C) to a vertical deflection winding (Ly,Fig. 1c) to produce a vertical deflection current (iy) in accordance with a difference between the sawtooth and third signals such that picture height adjustment does not affect vertical centering.
摘要:
A parabolic voltage generating circuit includes an arrangement (IC1) for generating a sawtooth vertical deflection current (i V ) that flows in a vertical deflection winding (L V ), in a DC blocking capacitor (C V ) and in a deflection current sampling resistor (R S ). An emitter electrode of a transistor (Q3) is coupled between the deflection winding and the capacitor. A base electrode of the transistor is coupled between the capacitor and the resistance. A collector current (i c ) of the transistor varies in a vertical rate parabolic manner and has a DC average value that is determined by a DC average value of a voltage that is developed in the capacitor. The collector current is applied to an East-West raster distortion correction circuit for modulating an amplitude of a horizontal deflection current.
摘要:
A parabolic voltage generating circuit includes an arrangement (IC1) for generating a sawtooth vertical deflection current (i V ) that flows in a vertical deflection winding (L V ), in a DC blocking capacitor (C V ) and in a deflection current sampling resistor (R S ). An emitter electrode of a transistor (Q3) is coupled between the deflection winding and the capacitor. A base electrode of the transistor is coupled between the capacitor and the resistance. A collector current (i c ) of the transistor varies in a vertical rate parabolic manner and has a DC average value that is determined by a DC average value of a voltage that is developed in the capacitor. The collector current is applied to an East-West raster distortion correction circuit for modulating an amplitude of a horizontal deflection current.