摘要:
The invention provides a computing apparatus and method for maintaining a journal log 80. The computing apparatus includes volatile storage for storing a log buffer 60 and a non-volatile storage for storing a journal log 80. Non-volatile storage means 70 are provided for storing in a write-ahead data set a plurality of short data blocks. The log buffer contents are written to the write-ahead data set responsive to a process epoch occurring before the log buffer is filled. The log buffer contents are written to the journal log upon the log buffer being filled. The redoing or undoing of data base changes is made with reference to the write ahead data set only in the case of a system failure resulting in loss of log buffer data not yet written to the journal log; otherwise data base changes are redone or undone with reference to the log buffer or journal log.
摘要:
A computing system is characterized by a database management system which provides method and apparatus for online definition of data descriptors (77) while maintaining the availability of data (76) and data descriptors not impacted by a concurrent definitional process. Under the control of the database management system (70) of the invention, the domain effected by the definitional process is determined, transactions which reference descriptors within the domain effected by the definitional process are marked for rebinding, prior-to-commit access by transactions which have not been prebound to objects within the domain effected by the definitional process is inhibited, and thereafter all accesses to objects in the domain are allowed.
摘要:
The invention relates to an interruption mechanism for a data processing system. The interruption mechanism comprises an execution processing unit (1) and a memory unit (2). The execution processing unit (1) includes a basic processor status storage (13), an extended processor status storage (14), current and new processor status block pointer storages (11, 12), and an interruption control section (17). Following the acceptance of interruption request, the interruption mechanism is sequentially operated by a plurality of steps. The interruption mechanism improves the performance of the execution processing unit (1).
摘要:
Apparatus and method for managing a buffer pool (14) shared by sequential (16) and random processes (18). A data base manager includes a buffer manager (20) which: (1) maintains a normal least recently used (LRU) buffer chain and a sequential LRU buffer chain, the sequential LRU buffer chain being replicated on the normal LRU buffer chain; (2) places buffers released from a sequential process in both LRU buffer chains and buffers released from a random process only in the normal LRU buffer chain; and (3) responsive to a request for a buffer for a sequential process, steals the head buffer from the sequential LRU buffer chain, otherwise steals the head buffer from the normal LRU buffer chain. The buffer manager further includes means for conditionally asynchronously prefetching data set pages from the external storage device in response to a request for a data set page which is an integral multiple of a process defined prefetch quantity.
摘要:
Method and apparatus for assuring atomicity of user requested multi-row update operations to tables such as in a relation database (24), guaranteeing that for any update operation that succeeds all stated effects will have occurred and that for any update operation that fails the system state as perceived by the user remains unchaged. This is accomplished by establishing, in response to a multi-row update operation request, an execution module containing machine language code instructions implementing the update operation request with a savepoint request at the beginning of the execution module. For each set of instruction in or called by the execution module which modified the user perceived system state, undo information is logged to a soft log (20). Upon completing the execution module, the savepoint is dropped, causing all soft log information recorded since the savepoint to be deleted and releasing all resources held to guarantee restoration of the user perceived system state at the time of the savepoint request. Responsive to the detection of an error during execution of the module, the soft logged undo information is used to restore the user perceived state to that existing at the time of the savepoint request.
摘要:
A processor architecture is adapted to program languages operating with a sequential instruction flow and handling data through use of lists or tuples or simple types. It comprises a program holding means (1), an instruction holding means (2, 3) a data memory means (5) storing data objects, and execution means (7). Means (4, 5, 6) are provided for handling references to data objects referenced by bindings and comprising means (6) to increment reference counts to a data object and to decrement reference counts to a data object in dependence of an actual instruction from the instruction holding means (2, 3).
摘要:
There are disclosed methods, computing devices and software products that seek to reduce memory/processor overheads in static priority scheduled operating systems by reducing the number of resource contexts that need to be saved and restored when running a plurality of tasks. This may be achieved by forming mutually-exclusive non-pre-emption groups of tasks, and/or by determining which tasks share a common resource.
摘要:
A microprocessor with reduced context switching overhead and a corresponding method is disclosed. The microprocessor comprises a working register file that comprises dirty bit registers and working registers. The working registers including one or more corresponding working registers for each of the dirty bit registers. The microprocessor also comprises a decoder unit that is configured to decode an instruction that has a dirty bit register field specifying a selected dirty bit register of the dirty bit registers. The decoder unit is configured to generate decode signals in response. Furthermore, the working register file is configured to cause the selected dirty bit register to store a new dirty bit in response to the decode signals. The new dirty bit indicates that each operand stored by the one or more corresponding working registers is inactive and no longer needs to be saved to memory if a new context switch occurs.