公开(公告)号：EP1326429A3

公开(公告)日：2004-07-14

申请号：EP02258911.3

申请日：2002-12-20

申请人： Broadcom Corporation

发明人： Pasqualino, Christopher

IPC分类号： H04N5/08

CPC分类号： G09G5/006 ,  H04N5/08 ,  H04N5/4401

摘要： The present invention relates to a system and method for generating a blanking period indicator signal from sync information in video timing. The invention comprises an auto polarity detect processor adapted to automatically detect the polarity of at least one sync signal and a generation processor adapted to generate a DE signal.

公开(公告)号：EP1176810A1

公开(公告)日：2002-01-30

申请号：EP00402188.7

申请日：2000-07-28

申请人： THOMSON multimedia

发明人： Cheong, Yew Honn ,  Bandara, Rajasinghe Mudiyanselage Senarath

IPC分类号： H04N5/08

CPC分类号： H04N5/08 ,  G09G5/00

摘要： The invention proposes a display device comprising a video circuit (8) generating a composite synchronisation signal and an output pulse signal,and a synchronisation circuit (16) generating a vertical synchronisation signal based on a signal indicative of the vertical scan of the display.
The synchronisation circuit (16) automatically selects between the composite synchronisation signal and the output pulse signal as the signal indicative of the vertical scan of the display.

摘要翻译： 本发明提出一种显示装置，包括视频电路（8）产生一个复合同步信号，并输出脉冲信号，以及基于指示所述显示器的垂直扫描信号的垂直同步信号的同步电路（16）。 同步电路（16）中的复合同步信号和作为表示显示器的垂直扫描信号的所述输出脉冲信号之间自动选择。

公开(公告)号：EP1152601A2

公开(公告)日：2001-11-07

申请号：EP01110480.9

申请日：2001-04-27

申请人： Thomson Licensing S.A.

发明人： Altmanshofer, Robert Dale ,  Crabb, Michael Evan

IPC分类号： H04N5/08

CPC分类号： H04N5/126

摘要： A horizontal synchronizing system, comprising: a source of a horizontal synchronizing signal (1fH INPUT); a source (20, 28) of first and second higher frequency horizontal drive signals; a phase detector (14) for generating a first control voltage (17) responsive to the horizontal synchronizing signal and the first horizontal drive signal; a source (22, 24) of a second control signal (25); and, a switch (18) for selectively supplying the first control signal to the source of the drive signals for a phase-locked mode of operation at the first higher frequency and supplying the second control signal to the source of the drive signals for a phase-unlocked mode of operation at the second higher frequency.

摘要翻译： 一种水平同步系统，包括：水平同步信号源（1fH INPUT）; 第一和第二较高频率水平驱动信号的源极（20,28）; 相位检测器（14），用于响应于水平同步信号和第一水平驱动信号产生第一控制电压（17）; 第二控制信号（25）的源（22,24）; 以及开关（18），用于选择性地将第一控制信号提供给驱动信号的源，以进行第一较高频率的锁相操作模式，并将第二控制信号提供给驱动信号的源 在第二较高频率下的动态操作模式。

公开(公告)号：EP1051029A2

公开(公告)日：2000-11-08

申请号：EP00302553.3

申请日：2000-03-28

申请人： Nokia Corporation

发明人： Haapakoski, Hannu ,  Salonen, Vesa ,  Vigelius, Kari

IPC分类号： H04N5/04 ,  H04N5/08

CPC分类号： G09G5/006 ,  G09G5/18 ,  H04N5/10

摘要： A method and a device for filtered sync signals detection wherein a timing circuit is used to select the steep slope portion in one or both of the leading edge and the trailing edge of the sync signals; a voltage divider or feedback path to set a triggering point at the steep slope portion of the selected edge regardless the slope being positive or negative; and a triggerable device is used to generate new sync signals with the leading edge of each sync pulse starts at one triggering point and the trailing edge starts at another triggering point. Alternatively, a micro-controller is used to detect the polarity of the sync signals and accordingly provide a reference voltage in order to set the triggering point at the leading edge of the sync signals.

摘要翻译： 一种用于滤波同步信号检测的方法和装置，其中使用定时电路来选择同步信号的前沿和后沿中的一个或两个中的陡峭斜率部分; 分压器或反馈路径，用于在所选边缘的陡倾斜部分设置触发点，而不管斜率为正或负; 并且可触发装置用于产生新的同步信号，每个同步脉冲的前沿从一个触发点开始，并且后沿从另一个触发点开始。 或者，微控制器用于检测同步信号的极性，并因此提供参考电压，以便将触发点设置在同步信号的前沿。

公开(公告)号：EP0784398A3

公开(公告)日：1999-03-10

申请号：EP97300139.9

申请日：1997-01-10

申请人： Samsung Electronics Co., Ltd.

发明人： Ki-Bum, Kim

IPC分类号： H04N5/08

CPC分类号： H04N5/08 ,  H04N5/4401

摘要： An apparatus for detecting a field sync signal in a HDTV includes a sign bit selector (202) for selecting only a sign bit from a received HDTV signal; a correlation portion (206) for determining the correlation value of the selected sign bit and a predetermined reference signal; a detector (208, 210) for comparing the correlation value with a threshold value, to thereby determine a field sync timing signal; and a generator (212, 214, 216) for generating a field sync signal which has a logic "HIGH" level during one field sync segment interval in response to the field sync timing signal. Here, only one MSB of input data is selected and then correlation with the reference signal is determined. Accordingly, a field sync signal which has a logic "HIGH" level during one field segment interval in each field can be accurately detected, and thus a hardware structure is simplified.

公开(公告)号：EP0760582A3

公开(公告)日：1999-01-20

申请号：EP96306295.5

申请日：1996-08-30

申请人： SONY CORPORATION

发明人： Iwasaki, Nobutaka, c/o Sony Kokubu Semicond Corp ,  Numata, Hiroshi, c/o Sony Corporation

IPC分类号： H04N5/08

CPC分类号： H04N5/08

摘要： In a vertical synchronizing signal stabilizing circuit, an integrated circuit and a television signal processing device, a vertical synchronizing signal of which period is stabilized can be output with a small number of elements and a simple constitution, without being influenced by the state of the television signal. On the basis of a first distinguish signal which indicates whether there is a separated signal separated from the television signal as the vertical synchronizing signal or not and of a second distinguish signal which indicates whether the period of the separated signal is the standard period or not, the plural states of the separated signal are discriminated, and the processing mode of the separated signal processing means is switched on the basis of the result of the discrimination to process the separated signal.

公开(公告)号：EP0782329A2

公开(公告)日：1997-07-02

申请号：EP96120944.2

申请日：1996-12-27

申请人： NEC CORPORATION

发明人： Niijima, Shinji

IPC分类号： H04N5/08

CPC分类号： H04N5/10

摘要： A horizontal synchronization signal generating circuit self-generates a horizontal synchronization signal if an actual horizontal synchronization signal fails to be detected in a composite video signal. Each time an edge-detection circuit detects an actual horizontal synchronization pulse, a counter and decoder are reset. An actual horizontal synchronization signal has a period of 63.5 µs. If the edge detection circuit fails to detect the actual horizontal synchronization signal, then the decoder outputs a self-generated horizontal synchronization signal at 64 µs and a selector circuit disables the edge detection circuit for approximately 35 µs. In contrast, if the edge-detection circuit detects an actual horizontal synchronization signal, the decoder is reset before it can output the self-generated signal and the selector disables the edge detection circuit for approximately 60 µs. Accordingly, a period of 35 µs exists during which an edge-detecting signal is disabled after a horizontal synchronizing output produced by self-generation has been outputted. The disabling period allows detection of horizontal synchronizing inputs when narrow pulse signals are lost during vertical synchronous periods, and allows immediate extraction of the horizontal synchronizing inputs regardless of the difference of the odd/even fields and allows outputting of the corresponding horizontal synchronizing output.

摘要翻译： 水平同步信号发生电路自身生成的速率的水平同步信号如果在实际的水平同步信号不能在一个复合视频信号被检测到。 每次边沿检测电路检测的实际的水平同步脉冲，计数器和译码器被复位。 一个实际的水平同步信号的周期是63.5微秒。 如果边缘检测电路没有检测到实际的水平同步信号，则解码器在64微秒输出自产生的水平同步信号和一个选择器电路禁用大约35微秒的边沿检测电路。 相反，如果边缘检测电路的实际水平同步信号检测，解码器是前可输出的自生信号reset和选择禁用大约60微秒的边沿检测电路。 因此，在边缘检测信号的哪一个由自发电产生的水平同步输出已经输出之后被禁用存在一段35微秒。 失效期间允许的水平同步输入检测当窄脉冲信号期间垂直同步周期被丢失，并且不管允许奇/偶场的差的的水平同步输入直接提取和允许相应的水平同步输出的输出廷。

公开(公告)号：EP0533997B1

公开(公告)日：1996-03-20

申请号：EP91116607.2

申请日：1991-09-27

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Kramer, Ronalf, Dipl.-Ing.

IPC分类号： H04N5/08 ,  H04N5/18

CPC分类号： H04N5/185 ,  H04N5/08

公开(公告)号：EP0599084A1

公开(公告)日：1994-06-01

申请号：EP93117607.7

申请日：1993-10-29

申请人： EASTMAN KODAK COMPANY

发明人： McNeilly, Peter Joseph, c/o EASTMAN KODAK COMPANY ,  Trzinski, Martin E., c/o EASTMAN KODAK COMPANY

IPC分类号： H04N5/08 ,  H04N5/10 ,  H04N5/12

CPC分类号： H04N5/08 ,  H04N5/10 ,  H04N5/126

摘要： A sync stripper circuit (22) receives from a medical imaging modality a composite video signal with a horizontal sync frequency within one of first, second, third or fourth frequency ranges. The sync stripper circuit (22) includes a circuit (36), (38) for stripping the composite sync signal from the received signal; horizontal sync detection circuit (42) for detecting the horizontal sync signal from the stripped composite sync signal; a vertical sync detection (40) circuit for detecting the vertical sync signal; an F1/F2 field detection circuit (44) for detecting the F1/F2 field from the stripped composite sync signal; and a control circuit (46) for controlling the horizontal sync detection circuit (42), the vertical sync detection circuit (40) and the F1/F2 field detection circuit (44) to operate in the selected one of said first, second, third or fourth frequency ranges of the received composite video signal. A serrating signal circuit inserts a horizontal signal into the vertical sync signal if serrating signals are absent therein.

摘要翻译： 同步剥离器电路（22）从医学成像模式接收具有在第一，第二，第三或第四或第四频率范围之一内的水平同步频率的复合视频信号。 同步剥离器电路（22）包括用于从接收信号中去除复合同步信号的电路（36），（38） 水平同步检测电路（42），用于从剥离的复合同步信号中检测水平同步信号; 用于检测垂直同步信号的垂直同步检测（40）电路; 用于从剥离的复合同步信号中检测F1 / F2场的F1 / F2场检测电路（44） 以及用于控制水平同步检测电路（42）的控制电路（46），垂直同步检测电路（40）和F1 / F2场检测电路（44），以在所选择的所述第一，第二，第三 或接收的复合视频信号的第四频率范围。 伺服信号电路如果在其中不存在锯齿信号，则将水平信号插入垂直同步信号。

公开(公告)号：EP0280425B1

公开(公告)日：1993-04-14

申请号：EP88300989.6

申请日：1988-02-05

申请人： PIONEER ELECTRONIC CORPORATION

发明人： Kanamaru, Hitoshi c/o Pioneer Elec. Corp.

IPC分类号： G11B19/28 ,  H04N5/93 ,  H04N5/08 ,  H04N5/91

CPC分类号： G11B27/005 ,  G11B19/28 ,  G11B2220/20 ,  H04N5/937 ,  H04N9/7921 ,  H04N9/802