摘要:
A multi-rate filter system is disclosed. More particularly, a computationally efficient multi-rate filter system for processing an audio stream on a consumer electronics device is disclosed. The multi-rate filter system includes a plurality of multi-rate filtering blocks, at least one block including a linear filter component. At least one multi-rate filtering block may include a nonlinear signal processing components. The multi-rate filter system may include a nonlinear functional block. A method of filtering a signal is also disclosed.
摘要:
A method of digitally correcting the raw output voltage (605) from a Capacitive Voltage Transformer (CVT) with the intent to remove transient components impacting on transient accuracy of protection function. A typical CVT is represented using three parameters in the linear CVT model. A digital filter (608) designed based on the three parameters and incorporating a dedicated mechanism to ensure numerical stability of the former. A method of self-adjusting the said filter based on system events and performed after the method has been deployed in the field and supplied from a specific CVT.
摘要:
There is provided a sound processing apparatus and a sound processing method which are capable of reproducing discrete data with a high-quality sound matching users' preferences. In a sound processing means 2, since an interpolation value reflecting a value of a variable parameter ± by which the value of a control sampling function c 0 (t) is multiplied can be calculated, an analog signal obtained through the interpolation performed in a sampling function S N (t) can be regulated in accordance with the variable parameter ± by changing the value of the variable parameter ±. In this way, by allowing the user to appropriately change the variable parameter ± in accordance with various conditions including music reproduction environments, sound sources, musical tones and so on, it becomes possible to reproduce high-quality-sound music in which its frequency characteristics of the analog signal have changed and a high quality desired by the user is obtained.
摘要:
A data conversion device is provided with a data converting means that sequentially converts first data into second data of the number of second bits, wherein an analog signal is quantized into the first data by the number of first bits, and the first and second data can be first and second maximum values, respectively. The data converting means is comprised of a first conversion means (steps 21 and 23) that, when a value of the fast data is not the first maximum value, converts the first data to the second data by adding 0 to a lower bit side of the first data and a second conversion means (steps 21 and 24-26) that converts the first data to the second data so that, when a value of the first data is the fast maximum value, a value can be made larger, in accordance with a value be-fore or after the first data, than the data of the number of second bits obtained by adding 0 to the lower bit side of the first data. With the structure, when the data obtained by quantizing an analog signal is converted to data with the number of more bits, a rounding error by quantizing is improved as much as possible.
摘要:
The present invention is directed to a reconfigurable finite impulse response (FIR) filter that processes data tap values with canonical sign digit (CSD) coefficients. The FIR filter according to the present invention includes a shift group associated with at least one of the data tap values and at least one of the CSD coefficients. Each shift group includes a plurality of parallel paths. Each parallel path shifts the data tap value according to a bit pair of the coefficient to produce a weighted product. An adder is also included that combines the weighted products from each of the shift groups.
摘要:
A CMOS hybrid analog-digital receiver core where filtering and gain functions are implemented in the digital domain. The analog portion of the receiver core includes standard circuits such as a low noise amplifier for receiving an RF input signal, and a mixer circuit for down-converting the RF input signal to a base band frequency signal. The analog to digital conversion function is provided by a merged ADC filter circuit having a low order filter stage and an ADC stage. The low order filter stage performs low order filtering of the base band signal to reduce dynamic range and clock requirements for subsequent analog to digital conversion the ADC stage. The two circuit stages are considered to be merged since they both consist of an interconnection of identical transconductance cells, where each transconductance cell includes a series of interconnected CMOS inverters.
摘要:
A filtering method and system for a subband-domain is provided. A first analysis filter bank is configured to divide an input signal into a plurality of subbands. A second analysis filter bank divides one or more of the subbands into a second set of subbands. A modification unit accepts the plurality of subbands, the second set of subbands and modification data and outputs a plurality of modified frequency subbands. A first synthesis filter bank synthesizes the plurality of modified subbands. A filter then filters the plurality of modified subbands and the one or more synthesized modified subbands to obtain a plurality of filtered subbands. A second synthesis filter bank synthesizes the plurality of filtered subbands to obtain an output signal.