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公开(公告)号:EP4176466A1
公开(公告)日:2023-05-10
申请号:EP21836885.0
申请日:2021-06-30
申请人: Invensas Corporation
IPC分类号: H01L27/11578 , H01L27/11565 , H01L27/11568 , H01L27/11551 , H01L27/11519 , H01L27/11521
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公开(公告)号:EP3706127B1
公开(公告)日:2023-03-08
申请号:EP20170725.4
申请日:2012-08-14
发明人: GODA, Akira , AHMED, Safqat , HASNAT, Khaled , PARAT, Krishna K
IPC分类号: G11C16/02 , G11C16/26 , G11C16/12 , G11C16/14 , G11C16/34 , H01L27/11519 , H01L27/11556 , H01L27/11565 , H01L27/11582
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公开(公告)号:EP3316282B1
公开(公告)日:2023-01-04
申请号:EP16834972.8
申请日:2016-07-26
发明人: OWADA Fukuo , TANIGUCHI Yasuhiro , KAWASHIMA Yasuhiko , YOSHIDA Shinji , KASAI Hideo , SAKURAI Ryotaro , SHINAGAWA Yutaka , OKUYAMA Kosuke
IPC分类号: H01L27/11573 , H01L27/11565 , H01L29/792 , H01L29/423 , H01L21/8234 , H01L27/092
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公开(公告)号:EP3669399B1
公开(公告)日:2022-10-12
申请号:EP18900415.3
申请日:2018-11-13
发明人: ZHANG, Yanli , ZHANG, Peng , ALSMEIER, Johann , DONG, Yingda
IPC分类号: H01L27/11582 , H01L27/1157 , G11C11/56 , G11C16/04 , G11C16/34 , G11C16/10 , H01L27/11565 , H01L27/11573 , H01L27/11575
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65.
公开(公告)号:EP4059052A1
公开(公告)日:2022-09-21
申请号:EP20888696.0
申请日:2020-09-16
发明人: KONG, Lingyu , DAYCOCK, David , KURAPATI, Venkata, Satyanarayana, Murthy , WIBOWO, Leroy, Ekarista
IPC分类号: H01L27/11582 , H01L27/11565 , H01L27/1157
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66.
公开(公告)号:EP4040490A1
公开(公告)日:2022-08-10
申请号:EP22164201.0
申请日:2017-09-07
IPC分类号: H01L27/11582 , H01L27/11573 , H01L27/11565
摘要: The contact area between a source strap structure of a buried source layer and semiconductor channels within memory structures can be increased by laterally expanding a source-level volume in which the memory stack structures are formed. In one embodiment, sacrificial semiconductor pedestals can be formed in source-level memory openings prior to formation of a vertically alternating stack of insulating layers and sacrificial material layers. Memory openings can include bulging portions formed by removal of the sacrificial semiconductor pedestals. Memory stack structures can be formed with a greater sidewall surface area in the bulging portions to provide a greater contact area with the source strap structure. Alternatively, bottom portions of memory openings can be expanded selective to upper portions during, or after, formation of the memory openings to provide bulging portions and to increase the contact area with the source strap structure.
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公开(公告)号:EP4016627A1
公开(公告)日:2022-06-22
申请号:EP21151887.3
申请日:2021-01-15
发明人: YEH, Teng-Hao , LUE, Hang-Ting , LEE, Guan-Ru
IPC分类号: H01L27/11578 , H01L27/11565 , H01L21/28 , H01L27/11575
摘要: A three-dimensional memory device and a method for manufacturing the same are provided. The three-dimensional memory device includes a plurality of tiles, and each tile includes a plurality of blocks, and each block includes a gate stacked structure, a conductive layer, first ring-shaped channel pillars, source/drain pillars, and charge storage structures. The gate stacked structure disposed on the substrate includes gate layers electrically insulated from each other. The conductive layer is disposed between the substrate and the gate stacked structure. The first ring-shaped channel pillars are disposed on the substrate and located in the gate stacked structure. Each of the first ring-shaped channel pillars is configured with two source/drain pillars disposed therein. Each of the charge storage structures is disposed between the corresponding gate layer and the corresponding first ring-shaped channel pillar. The conductive layer in one of the tiles is isolated from the conductive layers in the other tiles.
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68.
公开(公告)号:EP4010923A1
公开(公告)日:2022-06-15
申请号:EP20850045.4
申请日:2020-05-06
发明人: HU, Yi , CARLSON, Merri, L. , CHANDOLU, Anilkumar , CHARY, Indra, V. , DAYCOCK, David , JAIN, Harsh, Narendrakumar , KING, Matthew, J. , LI, Jian , LOWE, Brett, D. , MOKHNA RAU, Prakash, Rau , XU, Lifang
IPC分类号: H01L27/11582 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L21/768
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公开(公告)号:EP3975255A1
公开(公告)日:2022-03-30
申请号:EP21182547.6
申请日:2021-06-29
发明人: KIM, Junhyoung , KIM, Chanho , YUN, Kyunghwa , KIM, Dongseong
IPC分类号: H01L27/11573 , H01L27/11582 , H01L23/00 , H01L27/11575 , H01L27/11565
摘要: A semiconductor device and an electronic system are disclosed. The semiconductor device includes a semiconductor substrate; a peripheral circuit structure including peripheral circuits integrated on the semiconductor substrate, and a landing pad connected to the peripheral circuits; a semiconductor layer on the peripheral circuit structure; a metal structure in contact with a portion of the semiconductor layer, the metal structure including first portions extending in a first direction, second portions connected to the first portions and extending in a second direction crossing the first direction, and a via portion vertically extending from at least one of the first and second portions and being connected to the landing pad; and a stack including insulating layers and electrodes vertically and alternately stacked on the metal structure.
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公开(公告)号:EP3912190A1
公开(公告)日:2021-11-24
申请号:EP19910513.1
申请日:2019-10-24
发明人: HOWDER, Collin , HALLER, Gordon A.
IPC分类号: H01L27/11582 , H01L27/1157 , H01L27/11565 , H01L29/792 , H01L29/66
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