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    METHOD FOR GENERATING A PULSE SIGNAL SEQUENCE
    64.
    发明公开
    METHOD FOR GENERATING A PULSE SIGNAL SEQUENCE 审中-公开
    VERFAHREN ZUR ERZEUGUNG EINES IMPULSSIGNALFOLGE

    公开(公告)号：EP2729773A2

    公开(公告)日：2014-05-14

    申请号：EP12743927.1

    申请日：2012-07-17

    申请人： Siemens Aktiengesellschaft

    发明人： PFEIFER, Uwe ,  ZIDORN, Michael

    IPC分类号： G01H1/00 ,  G06F1/02

    CPC分类号： G01M15/042 ,  G01H1/006 ,  G06F1/022

    摘要： A method for generating a pulse signal sequence using a processor unit (28) shall be provided that allows calibrating a tip timing measurement system in a turbomachine in order to increase operational security and lifespan of the turbomachine. This is achieved by the method comprising the steps of: - storing a number of wait time elements in a memory unit (30), - creating a pulse signal in a signal output unit (24) during at least one processor cycle, - reading a wait time element from said memory unit (30), and - creating a null signal in said signal output unit (24) for a number of processor cycles derived from said wait time element read.

    摘要翻译： 提供了一种使用处理器单元产生脉冲信号序列的方法，其允许校准涡轮机中的尖端定时测量系统，以便增加涡轮机的操作安全性和寿命。 这通过具有以下步骤的方法来实现：在存储单元中存储多个等待时间元素，在至少一个处理器周期内在信号输出单元中产生脉冲信号，从存储器单元读取等待时间元素，以及 在信号输出单元中产生从等待时间元素读取导出的多个处理器周期的空信号。

    State machine
    65.
    发明公开
    State machine 审中-公开
    Zustandsmaschine

    公开(公告)号：EP2202604A1

    公开(公告)日：2010-06-30

    申请号：EP09180740.4

    申请日：2009-12-24

    申请人： STMicroelectronics Srl ,  STMicroelectronics Design and Application S.R.O.

    发明人： Loidl, Ales ,  Bellomo, Ignazio ,  Giussani, Luca ,  Vincenzoni, David

    IPC分类号： G06F1/02

    CPC分类号： G06F1/025

    摘要： A state machine for generating signals configured for generating different signals according to the current state (S0, S1, S2, S3, IDLE) of the machine. The state machine is configured to change state both as a function of an internal timer (Cmp(n)) and as a function of signals (Edge(x); Edge (y)) representative of events external to the state machine.

    摘要翻译： 一种用于产生根据机器的当前状态（S0，S1，S2，S3，IDLE）生成不同信号的信号的状态机。 状态机被配置为根据内部定时器（Cmp（n））的功能改变状态，并且作为代表状态机外部事件的信号（Edge（x）; Edge（y））的函数。

    DISPOSITIF PORTABLE DE CONTROLE D'EXECUTION D'INSTRUCTIONS VIA DES ACTIONNEURS PLACES SUR UNE FACE ARRIERE
    66.
    发明公开
    DISPOSITIF PORTABLE DE CONTROLE D'EXECUTION D'INSTRUCTIONS VIA DES ACTIONNEURS PLACES SUR UNE FACE ARRIERE 审中-公开
    便携式装置用于控制指令的执行使用在平面上在后面作动器放置

    公开(公告)号：EP2165245A1

    公开(公告)日：2010-03-24

    申请号：EP08831151.9

    申请日：2008-07-04

    申请人： Jolly, Patrice

    发明人： Jolly, Patrice

    IPC分类号： G06F1/02 ,  G06F1/16

    CPC分类号： G06F1/1664 ,  G06F1/1626 ,  G06F1/1647 ,  G06F1/1671 ,  G06F3/0219 ,  G06F3/0234 ,  G06F3/0238

    摘要： The invention relates to a device (D) intended for controlling the execution of instructions, that comprises: i) a receptacle (RP) carried by at least one hand of a user and having a rear surface (FAR) provided with rear actuators (AC); ii) a storing means (MS) capable of storing, for at least one application, a table of correspondence between at least one operation mode and a set of selected instructions associated with icons of relative positions defined according to a selected arrangement; and ii) control means (MC) for, in case an application operation mode is selected, determining the table corresponding thereto and associating the instructions contained in said table to actuation types of the rear actuators (AC) selected on the basis of the relative positions of icons respectively associated with these instructions, at least some of said icons being displayed on at least one screen (EC1) according to their selected arrangement so as to materialise the relative positions on the rear surface (FAR) of the rear actuators (AC) and of the selected actuation types, and, in case of manual actuation according to one type of actuation of a rear actuator (AC), commanding the execution of the instruction associated with the type of actuation of said rear actuator (AC).

    摘要翻译： ⅰ）的插座（RP）确实可以由用户在至少一个手握住，并且具有一个后表面（FAR）设置有后的致动器：本发明涉及到一个设备（D），用于控制的指令的执行，包括没 （AC）; ⅱ）存储装置（MS）能够存储，用于至少一个应用程序，至少一个操作模式和一组具有限定gemäß到选定装置的相对位置的图标相关联的所选的指令之间的对应关系的表; 以及ii）控制装置（MC），用于在应用操作模式的情况下被选择，确定的采矿表与其对应和相关联包含在所述表中的指令来致动的相对位置的基础上选择的类型的后致动器（AC）的 分别与论文指令相关联的图标，至少一些所述图标被至少一个屏幕（EC1）雅丁上显示他们的选择的装置，以便识别的相对位置，后致动器的后表面（FAR）上（AC ）和所选择的致动类型，并且在手动致动gemäß的情况下，一种类型的一个后致动器的致动（AC）的，指挥与所述后致动器的致动（AC）的类型相关联的所述指令的执行的。

    Method for synthesizing linear finite state machines
    67.
    发明公开
    Method for synthesizing linear finite state machines 有权
    Verfahren zur Synthetisierung linearer endlicher Automaten

    公开(公告)号：EP2144134A1

    公开(公告)日：2010-01-13

    申请号：EP09174964.8

    申请日：2000-11-15

    申请人： Mentor Graphics Corporation

    发明人： Rajski, Janusz ,  Tyszer, Jerzy ,  Kassab, Mark ,  Mukherjee, Nilanjan

    IPC分类号： G06F1/02 ,  G06F7/58

    CPC分类号： G06F7/584 ,  G06F2207/583 ,  H03K3/84

    摘要： Method and apparatus for synthesizing high-performance linear finite state machines (LFSMs) such as linear feed-back shift registers (LFSRs) or cellular automata (CA). Given a characteristic polynomial for the circuit, the method obtains an original LFSR circuit (26) such as a type I or type II LFSR. Feedback connections within the original circuit are then determined (28). Subsequently, a number of transformations that shift the feedback connections can be applied in such a way that properties of the original circuit are preserved in a modified LFSR circuit (30). In particular, if the original circuit is represented by a primitive characteristic polynomial, the method preserved the maximum-length property of the original circuit in the modified circuit and enables the modified circuit to produce the same m-sequence as the original circuit. Through the various transformations, a modified LFSR circuit can be created that provides higher performance through shorter feedback connection lines, fewer levels of logic, and lower internal fan-out.

    摘要翻译： 用于合成诸如线性反馈移位寄存器（LFSR）或细胞自动机（CA）的高性能线性有限状态机（LFSM）的方法和装置。 给定电路的特征多项式，该方法获得诸如I型或II型LFSR的原始LFSR电路（26）。 然后确定原始电路内的反馈连接（28）。 随后，可以以这样的方式应用移动反馈连接的多个变换，使得原始电路的属性保存在修改的LFSR电路（30）中。 特别地，如果原始电路由原始特征多项式表示，则该方法保留了修改电路中原始电路的最大长度特性，并使得修改电路能够产生与原始电路相同的m序列。 通过各种转换，可以创建一个修改后的LFSR电路，通过较短的反馈连接线路提供更高的性能，更低的逻辑电平和更低的内部扇出。

    DIRECT DIGITAL SYNTHESIZER BASED ON DELAY LINE WITH SORTED TAPS
    69.
    发明公开
    DIRECT DIGITAL SYNTHESIZER BASED ON DELAY LINE WITH SORTED TAPS 审中-公开
    直接数字频率合成基于包括各式水龙头延迟线

    公开(公告)号：EP1360791A4

    公开(公告)日：2009-08-26

    申请号：EP02709427

    申请日：2002-02-05

    申请人： MOTOROLA INC

    发明人： BOCKELMAN DAVID E

    IPC分类号： G06F1/02 ,  G06F1/10 ,  H03K5/13 ,  H03L7/081 ,  H03L7/16 ,  H04L7/00 ,  H03B21/00 ,  H03H11/26 ,  H03L7/00

    CPC分类号： G06F1/022 ,  G06F1/10 ,  H03K5/133 ,  H03L7/0812 ,  H03L7/16

    摘要： A digital frequency synthesizer includes a clock which produces a clock signal oscillating at a fixed frequency and a delay line which receives the clock signal and which produces therefrom a plurality of phase shifted clock signals oscillating at the fixed frequency. Each phase shifted clock signal is shifted in phase with respect to the clock signal and with respect to the other phase shifted clock signals. A look-up table receives an address value related to an ideal phase shifted clock signal oscillating at the fixed frequency and outputs a tap address related to the address value. A selection circuit receives the plurality of phase shifted clock signals and the tap address and outputs one of the phase shifted clock signals in response thereto. A sampling circuit samples at least a portion of the one phase shifted clock signal output by the selection circuit and outputs the sampled portion to form at least a part of an oscillator signal having a desired frequency.