Method for measuring modulation accuracy
    71.
    发明公开
    Method for measuring modulation accuracy 失效
    Verfahren und Vorrichtung zur Messung der Modulationsgenauigkeit。

    公开(公告)号:EP0473282A2

    公开(公告)日:1992-03-04

    申请号:EP91306716.1

    申请日:1991-07-23

    IPC分类号: G01R25/00 G01R29/06 H04L1/20

    CPC分类号: G01R25/00 G01R29/06 G01R29/26

    摘要: A method and apparatus for determining the phase and amplitude accuracy of continuous-phase-modulated signals is described. A modulated RF signal generated by a transmitter is down converted to a relatively low intermediate frequency which is filtered and sampled by a high sampling rate analog-to-digital converter. A digital signal processor processes the digital signals to produce a measured phase function corresponding to the modulated RF signal. From the measured amplitude and phase functions, an estimate of the ideal reference phase function corresponding to the modulated RF signal is calculated and synthesized. The reference phase function is compared to the measured phase function to determine the phase function from which the modulated RF signal phase error and frequency error are computed.

    摘要翻译: 描述了用于确定连续相位调制信号的相位和幅度精度的方法和装置。 由发射机产生的调制RF信号被下变频到相对较低的中频,其被高采样率模数转换器滤波和采样。 数字信号处理器处理数字信号以产生对应于经调制的RF信号的测量相位函数。 从测量的幅度和相位函数中,计算并合成对应于调制的RF信号的理想参考相位函数的估计。 将参考相位功能与测量的相位函数进行比较,以确定计算调制的RF信号相位误差和频率误差的相位函数。

    DIGITAL PHASE-FREQUENCY DISCRIMINATOR COMPRISING SIMPLIFIED RESET MEANS
    73.
    发明授权
    DIGITAL PHASE-FREQUENCY DISCRIMINATOR COMPRISING SIMPLIFIED RESET MEANS 失效
    数字相位差分复用器包含简化的复位方式

    公开(公告)号:EP0246269B1

    公开(公告)日:1991-06-19

    申请号:EP86906524.3

    申请日:1986-09-25

    IPC分类号: G01R25/00 H03K5/26

    CPC分类号: H03D13/004 G01R25/00 H03K5/26

    摘要: A phase-frequency discriminator comprising a first RS latch coupled to provide first output signals, said first RS latch including an S input terminal coupled to receive first input signals; a second RS latch coupled to provide second output signals, said second RS latch including an S input terminal coupled to receive second input signals; a third RS latch including an S input terminal coupled to a Q(Boolean not) output terminal of said first RS latch and including a Q(Boolean not) output terminal couples to an R input terminal of said first RS latch and including a Q(Boolean not) output terminal coupled to an R input terminal of said first RS latch; a fourth RS latch including an S input terminal coupled to a Q(Boolean not) output terminal of said second RS latch and including a Q(Boolean not) output terminal coupled to an R input terminal of said second RS latch; and reset means for providing a reset signal when said first and second input signals both have changed from a first to a second logical state such that the first and second output signals change back from the second to the first logical state after a reset time interval substantially long enough for the respective first and second output signals to reach full logic amplitude levels for the second logical state.

    Programmable time advance
    75.
    发明公开
    Programmable time advance 失效
    可编程时间提前

    公开(公告)号:EP0353027A3

    公开(公告)日:1991-01-30

    申请号:EP89307556.4

    申请日:1989-07-25

    发明人: Lesko, Alan J.

    CPC分类号: G01R31/3191 G01R31/31922

    摘要: A programmable time advance circuit functions to offset the inherent delay in a printed circuit board test system (107) used to provide a clock signal (106) that exactly matches the clock signal (129) of a printed circuit board under test (103). A clock advance signal (104) is inserted into a phase locked loop (140) to advance the timing of the clock signal generator circuit (101) to compensate for the delay occasioned by the system components.

    Exponential decay time constant measurement using frequency of offset-phase locked loop: system and method
    76.
    发明公开
    Exponential decay time constant measurement using frequency of offset-phase locked loop: system and method 无效
    使用频率相位锁定环的频率的频率衰减衰减时间恒定测量的指数衰减时间的恒定衰减时间:系统和方法相位锁定环路的系统和方法:系统和方法

    公开(公告)号:EP0294938A3

    公开(公告)日:1990-03-28

    申请号:EP88304136.0

    申请日:1988-05-06

    IPC分类号: G01N21/64 G01R25/00 G01R23/00

    摘要: Oxygen determination based on luminescence quenching of fluorescent dye is effected by using the frequency output of an offset-phase locked loop (15) to calculate the time constant for the exponential decay of fluorescence. An offset phase angle between a periodic stimulus signal used to excite the dye and a response signal based on fluorescence detection is predetermined to optimize signal-to-noise ration for a wide range of time constants. An offset-phase locked loop (15) is used to vary the frequency of a periodic stimulus signal until the predetermined phase relationship is established, and the frequency forms a measure of the decay rate. Where the stimulus and response signals are substantially sinusoidal, the offset phase angle is ideally about 49.3°, although substantially optimal performance is achieved using a more conveniently generated 45°. The 45° angle offset can also be used with a square-wave stimulus signal.

    Phase detector
    77.
    发明公开
    Phase detector 失效
    相位检测器

    公开(公告)号:EP0256637A3

    公开(公告)日:1989-10-11

    申请号:EP87305398.7

    申请日:1987-06-18

    IPC分类号: G01R25/00 G01R25/04

    CPC分类号: G01R25/04 G01R25/00

    摘要: A phase detector for indicating the magnitude of a phase difference between two electrical signals applied to it, is provided with means for introducing a deliberate phase shift into one of the signals so that the measured phase difference never closely approaches 0° or a multiple of 360°. The detector is capable of providing a smooth output signal over a very wide range of phase difference which can exceed many multiples of 360°. Furthermore, the phase comparator is never required to perform measurements in those regions of least accuracy close to zero phase difference.

    Messschaltung zur Phasenmessung gepulster Hochfrequenzsignale
    78.
    发明公开
    Messschaltung zur Phasenmessung gepulster Hochfrequenzsignale 失效
    测量用于脉冲的高频信号的相位测量电路。

    公开(公告)号:EP0325173A2

    公开(公告)日:1989-07-26

    申请号:EP89100559.7

    申请日:1989-01-13

    IPC分类号: G01R25/00 H05H13/04

    CPC分类号: G01R25/00

    摘要: Eine Meßschaltung zur Phasenmessung gepulster Hochfrequenz-­Signale besitzt einen Phasendetektor (2), der einen Meß­signaleingang (1) und einen Referenzsignaleingang (3) auf­weist und der aus der Phasendifferenz zwischen Meßsignal und Referenzsignal ein Phasendifferenzsignal erzeugt, das einer Sample & Hold-Schaltung (4) zugeführt wird, die daraus eine Gleichspannung erzeugt. Die Gleichspannung wird einem Phasenkorrekturspeicher (8) eingegeben, in dem eine Korrek­tur der Nichtlinearität des Phasendetektors erfolgt. An den Meßsignaleingang (i) und den Referenzsignaleingang (3) ist eine Amplitudengewinnungsschaltung (6) angeschlossen, die die Amplitude des Meßsignals und des Referenzsignals ermittelt. An den Ausgang der Amplitudengewinnungsschaltung (6) ist ein Amplitudenkompressionsspeicher (10) angeschlossen, der eine mit der Signalamplitude steuerbare Dichte der Kennlinienkorrekturen vornimmt. Die Ausgänge der Sample & Hold-Schaltung (4) und der Amplitudenkompressionsschaltung (10) steuern den Phasenkorrekturspeicher (8), der die Verzerrung der Phasenkennlinie korrigiert.

    摘要翻译: 对于具有相位检测器(2)脉冲高频信号的相位测量,其具有输入测量信号(1)和一参考信号输入的测量电路(3),并且测量样品的信号与参考信号保持电路之间产生从所述相位差的相位差信号(4- )被供给,其产生DC电压。 直流电压被输入到一个相位校正存储器(8),其中,所述相位检测器的非线性的校正发生。 在测量信号输入(i)和参考信号输入端(3)是一个幅度提取电路(6)被连接,它决定了的测量信号和参考信号的幅度。 的振幅压缩存储器(10)被连接到执行与控制的特性曲线的校正的信号振幅密度振幅提取电路(6)的输出。 样品的输出和保持电路(4)和控制其校正相位特性的失真的相位校正存储器(8),振幅压缩电路(10)。

    HIGH IMPEDANCE FAULT ANALYZER IN ELECTRIC POWER DISTRIBUTION.
    80.
    发明公开
    HIGH IMPEDANCE FAULT ANALYZER IN ELECTRIC POWER DISTRIBUTION. 失效
    高阻抗故障分析仪在供电系统。

    公开(公告)号:EP0299060A4

    公开(公告)日:1989-05-16

    申请号:EP88902269

    申请日:1988-01-15

    发明人: JEERINGS DONALD I

    摘要: A system (Fig. 3) and method for detecting an abnormality in a network (10) for distributing or transmitting electric power at a predetermined fundamental frequency. The system produces a signal (40) representing the fundamental frequency and another signal (42) representing a harmonic current occuring in the network. The phasor relation between the fundamental voltage and harmonic current representing signal are compared (44). The system produces a signal (82) indicating the occurence of a high impedance fault in response to a predetermined change in the compared phasor relationship. Embodiments (Figs. 5 and 6) are disclosed utilizing expression of signals within the network in polar coordinates, as well as embodiments (Fig. 11) utilizing signals expressed in rectangular coordinates. Such embodiments include both circuitry for detecting zero crossing phenomena, as well as circuitry for producing representation of signal phasor products.