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    PROVIDING FAULT-TOLERANCE BY COMPARING ADDRESSES AND DATA FROM REDUNDANT PROCESSORS RUNNING IN LOCK-STEP
    81.
    发明授权
    PROVIDING FAULT-TOLERANCE BY COMPARING ADDRESSES AND DATA FROM REDUNDANT PROCESSORS RUNNING IN LOCK-STEP 有权
    提供宽恕对方以及锁步数据比较OPERATED冗余处理器

    公开(公告)号：EP1379951B1

    公开(公告)日：2006-06-07

    申请号：EP02721731.4

    申请日：2002-04-11

    Applicant: SUN MICROSYSTEMS, INC.

    Inventor： CHAUDHRY, Shailender ,  TREMBLAY, Marc

    IPC: G06F11/22

    CPC classification number: G06F11/184 ,  G06F11/1641 ,  G06F11/1645

    Abstract: One embodiment of the present invention provides a system that facilitates fault-tolerance by using redundant processors. This system operates by receiving store operations from a plurality of redundant processors running the same code in lockstep. The system compares the store operations to determine if the store operations are identical, thereby indicating that the redundant processors are operating correctly. If the store operations are identical, the system combines the store operations into a combined store operation, and forwards the combined store operation to a system memory that is shared between the redundant processors. If the store operations are not identical, the system indicates an error condition. In a variation on this embodiment, the system similarly combines store operations.

    Service portal with application framework for facilitating application and feature development
    83.
    发明公开
    Service portal with application framework for facilitating application and feature development 审中-公开
    应用框架服务门户，方便的功能和应用程序开发

    公开(公告)号：EP1308841A3

    公开(公告)日：2006-05-24

    申请号：EP02257591.4

    申请日：2002-11-01

    Applicant: SUN MICROSYSTEMS, INC.

    Inventor： Braum, Phillip E. ,  Davis, Larry W. ,  Clark, Michael S.

    IPC: G06F9/50 ,  G06F9/44

    CPC classification number: G06F9/54 ,  G06F9/465 ,  G06F17/30893

    Abstract: A computer system for controlling access to an application used to provide a service to users in a network and to facilitate feature development in the application. The system includes a service application including features or feature mechanisms for providing service functions. The feature mechanisms each include a model interface portion, a view portion, and a controller portion to separate access to business model properties and data from content presentation. Memory stores application-specific data and lists of the feature mechanisms of the application. The system further includes a portal framework that receives user requests from client devices and for transmitting responses. The framework processes the request to determine which feature mechanism is being requested, routes the user request to appropriate feature mechanism, and builds a response with a content page from the view portion and a reusable portion built by the framework.

    Method, apparatus, and article of manufacture for time profiling multithreaded programs
    86.
    发明公开
    Method, apparatus, and article of manufacture for time profiling multithreaded programs 审中-公开
    一种方法，装置和制品，用于创建在多线程程序的时间曲线

    公开(公告)号：EP0953908A3

    公开(公告)日：2006-05-17

    申请号：EP99401037.9

    申请日：1999-04-28

    Applicant: SUN MICROSYSTEMS, INC.

    Inventor： Liang, Sheng

    IPC: G06F9/46 ,  G06F11/34

    CPC classification number: G06F11/3466 ,  G06F11/3404 ,  G06F11/3419 ,  G06F11/348 ,  G06F2201/865 ,  G06F2201/88

    Abstract: Methods, systems, and articles of manufacture consistent with the present invention time profile program threads using data corresponding to states of the registers of a processor(s) executing the threads. Methods, systems, and articles of manufacture consistent with the present invention determine whether a selected thread of execution of a multi-threaded program is running by suspending execution of the multi-threaded program, retrieving register data corresponding to the selected thread, computing register information based on the register data, comparing the computed register information with stored register information from a previous suspension of the multi-threaded program, and regarding the selected thread as running if the computed register information is different from stored register information. The last operation of regarding the selected thread as running may involve updating the previous register information based on the computed register information, and/or providing an indication corresponding to a portion of the program containing the selected thread.

    System and method for dynamic memory interleaving and de-interleaving
    87.
    发明公开
    System and method for dynamic memory interleaving and de-interleaving 有权
    用于动态存储器交织和解交织的系统和方法

    公开(公告)号：EP1653364A2

    公开(公告)日：2006-05-03

    申请号：EP05256336.8

    申请日：2005-10-12

    Applicant: SUN MICROSYSTEMS, INC.

    Inventor： Cypher, Robert E.

    IPC: G06F12/06

    CPC classification number: G06F12/0661 ,  G06F12/0607 ,  Y02D10/13

    Abstract: In one embodiment, a system includes a plurality of memory controllers each coupled between a processor and a respective memory. Each memory controller includes a plurality of decoders. Each decoder of a given memory controller may be independently configurable to match on a respective value of a subset of address bits such as the low-order cache line address bits, for example, received in a memory request. In one specific implementation, the number of decoders included on a given memory controller may correspond to the number of ways in which the memory is interleaved.

    Abstract translation: 在一个实施例中，一种系统包括多个存储器控制器，每个存储器控制器耦合在处理器和相应存储器之间 每个存储器控制器包括多个解码器。 给定存储器控制器的每个解码器可以被独立地配置为匹配地址位子集的相应值，例如在存储器请求中接收到的低位高速缓存线地址位。 在一个具体实现中，给定存储器控制器上包括的解码器的数量可以对应于存储器交错的方式的数量。

    BI-DIRECTIONAL COMMUNICATION SYSTEM WITH ECHO CANCELATION
    88.
    发明授权
    BI-DIRECTIONAL COMMUNICATION SYSTEM WITH ECHO CANCELATION 有权
    与回声抑制双向通信系统

    公开(公告)号：EP1374511B1

    公开(公告)日：2006-04-19

    申请号：EP02706220.7

    申请日：2002-02-11

    Applicant: SUN MICROSYSTEMS, INC.

    Inventor： DROST, Robert, J. ,  BOSNYAK, Robert, J.

    IPC: H04L25/02 ,  H04L25/06 ,  H04B3/23

    CPC classification number: H04L5/14 ,  H04L25/085 ,  H04L27/367

    Abstract: A bi-directional communication system and transceiver configuration are described, which employ a bi-directional reference to account for both common-mode and differential noise introduced at either end of a bi-directional communication channel. Some implementations exploit the techniques described in a bi-directional chip-to-chip communication scheme. In some implementations, the advantages of bi-directional reference techniques described herein are obtained while pre-distortion of transmitted signals is employed to compensate for intersymbol interference (ISI) in a communications channel.

    Method and apparatus for efficient object sub-typing
    89.
    发明公开
    Method and apparatus for efficient object sub-typing 审中-公开
    用于高效Objektuntertypierung方法和装置

    公开(公告)号：EP1324194A3

    公开(公告)日：2006-04-19

    申请号：EP02258759.6

    申请日：2002-12-19

    Applicant: SUN MICROSYSTEMS, INC.

    Inventor： Rose, John R. ,  Click, Clifford N.

    IPC: G06F9/44

    CPC classification number: G06F9/4492

    Abstract: An efficient method of sub-typing an object in an object oriented computing environment is provided. In one embodiment, the sub-typing method loads an input object having an object type, whereby an embedded array and a cache are searched for an object sub-typing data structure corresponding to the requested supertype. Any found object sub-typing data structures are associated with the input object. In some embodiments, if the object sub-typing data structure is not initially found, an overflow array is searched and the cache is updated with the object sub-typing data structure when the object sub-typing data structure is included in the overflow array. A system and software product is further provided in other embodiments whereby information associated with a particular object sub-type is obtained.

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