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    DYNAMIC PERFORMANCE MONITORING-BASED APPROACH TO MEMORY MANAGEMENT
    8.
    发明授权
    DYNAMIC PERFORMANCE MONITORING-BASED APPROACH TO MEMORY MANAGEMENT 有权
    动态绩效监测能力为基础的方法内存管理

    公开(公告)号：EP1702269B1

    公开(公告)日：2013-09-04

    申请号：EP04815427.2

    申请日：2004-12-24

    Applicant: Intel Corporation

    Inventor： SUBRAMONEY, Sreevinas ,  HUDSON, Richard ,  SERRANO, Mauricio ,  ADL-TABATABAI, Ali-Reza

    IPC: G06F12/02 ,  G06F11/34

    CPC classification number: G06F11/348 ,  G06F12/0253 ,  G06F12/0269 ,  G06F2201/88 ,  G06F2201/885 ,  Y10S707/99957

    Abstract: Techniques are described for optimizing memory management in a processor system. The techniques may be implemented on processors that include on-chip performance monitoring and on systems where an external performance monitor is coupled to a processor. Processors that include a Performance Monitoring Unit (PMU) are examples. The PMU may store data on read and write cache misses, as well as data on translation lookaside buffer (TLB) misses. The data from the PMU is used to determine if any memory regions within a memory heap are delinquent memory regions, i.e., regions exhibiting high numbers of memory problems or stalls. If delinquent memory regions are found, the memory manager, such as a garbage collection routine, can efficiently optimize memory performance as well as the mutators performance by improving the layout of objects in the heap. In this way, memory management routines may be focused based on dynamic and real-time memory performance data.

    DATA PROCESSING SYSTEM COMPRISING A MONITOR
    9.
    发明公开
    DATA PROCESSING SYSTEM COMPRISING A MONITOR 审中-公开
    DATENVERARBEITUNGSSYSTEM MIT EINEM BILDSCHIRM

    公开(公告)号：EP2353093A2

    公开(公告)日：2011-08-10

    申请号：EP09787267.5

    申请日：2009-09-22

    Applicant: Synopsys, Inc.

    Inventor： GEUZEBROEK, Marc, Jeroen ,  NIEUWLAND, Andre, Krijn ,  VERMEULEN, Hubertus, Gerardus, Hendrikus

    IPC: G06F11/34 ,  H04L12/26

    CPC classification number: G06F11/3495 ,  G06F11/348 ,  G06F11/349 ,  H04L43/00

    Abstract: A data processing system 100 comprising a monitor 120 is provided and corresponding system-on-chip, method for monitoring and computer program product. The data processing system comprises multiple processing devices 104, 106, 116, 116 and a monitor 120. The monitor is configured to monitor characteristics of the data streams 102, 112, occurring among the plurality of data processing devices. The monitor comprises a means to determine whether a system characteristic substantially deviates from an expected system characteristic and to raise an anomaly signal if so. The system characteristic depends on the first characteristic and the second characteristic. In this way the monitor increases robustness by monitoring for problems related to deviations in the relation between multiple data streams.

    Abstract translation: 提供了包括监视器120的数据处理系统100和对应的系统级芯片监视方法和计算机程序产品。 数据处理系统包括多个处理设备104,106,116,116和监视器120.监视器被配置为监视在多个数据处理设备之间发生的数据流102,112的特性。 监视器包括一种用于确定系统特性是否显着偏离预期系统特性的装置，如果是，则产生异常信号。 系统特性取决于第一特性和第二特性。 以这种方式，监视器通过监视与多个数据流之间的关系的偏差相关的问题来增强鲁棒性。

    SYSTEM FOR PROVIDING TRACE DATA IN A DATA PROCESSOR HAVING A PIPELINED ARCHITECTURE
    10.
    发明公开
    SYSTEM FOR PROVIDING TRACE DATA IN A DATA PROCESSOR HAVING A PIPELINED ARCHITECTURE 审中-公开
    系统ZUR BEREITSTELLUNG VON TRACEDATEN BEI EINEM DATENPROZESSOR MIT PIPELINEARCHITEKTUR

    公开(公告)号：EP2283419A2

    公开(公告)日：2011-02-16

    申请号：EP09738384.8

    申请日：2009-04-28

    Applicant: Imagination Technologies Limited

    Inventor： ISHERWOOD, Robert, Graham ,  OLIVER, Ian ,  WEBBER, Andrew

    IPC: G06F9/38

    CPC classification number: G06F9/382 ,  G06F9/30076 ,  G06F9/3012 ,  G06F9/30145 ,  G06F9/3836 ,  G06F9/3842 ,  G06F9/3867 ,  G06F9/4881 ,  G06F11/3476 ,  G06F11/348 ,  G06F2201/86 ,  G06F2201/88

    Abstract: The invention is a method and system for providing trace data in a pipelined data processor. Aspects of the invention include providing a trace pipeline in parallel to the execution pipeline, providing trace information on whether conditional instructions complete or not, providing trace information on the interrupt status of the processor, replacing instructions in the processor with functionally equivalent instructions that also produce trace information and modifying the scheduling of instructions in the processor based on the occupancy of a trace output buffer.

    Abstract translation: 本发明是一种用于在流水线数据处理器中提供跟踪数据的方法和系统。 本发明的方面包括提供与执行流水线并行的跟踪流水线，提供关于条件指令是否完成的跟踪信息，提供关于处理器的中断状态的跟踪信息，用处理器中的指令替换功能相同的指令， 产生跟踪信息，并根据跟踪输出缓冲区的占用率修改处理器中指令的调度。

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