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    DATA PROCESSING DEVICE
    4.
    发明公开
    DATA PROCESSING DEVICE 审中-公开
    数据处理设备

    公开(公告)号：EP3273353A1

    公开(公告)日：2018-01-24

    申请号：EP15886231.8

    申请日：2015-03-20

    Applicant: Renesas Electronics Corporation

    Inventor： YUYAMA, Yoichi ,  TAKADA, Kiwamu

    IPC: G06F11/18

    CPC classification number: G06F1/06 ,  G06F11/1608 ,  G06F11/1625 ,  G06F11/1641 ,  G06F11/1675 ,  G06F11/1695 ,  G06F13/4213 ,  G06F13/4226 ,  G06F13/4239 ,  H04L12/5601 ,  H04L2012/566

    Abstract: In a data processing device including two sets of circuit pairs which are respectively duplicated in two clock domains which are asynchronous to each other, an asynchronous transfer circuit that transfers a payload signal is provided between the two sets of circuit pairs. The asynchronous transfer circuit includes two sets of a pair of bridge circuits which are respectively connected to the two sets of circuit pairs, and asynchronously transfers the payload signal and a control signal indicating a timing at which the payload signal is stable on a reception side. The two sets of a pair of bridge circuits and the payload signals can be duplicated, but the control signal is not duplicated, and the received payload signal is used for timing control to supply an expected same time difference, to the pair of duplicated circuits. This enables asynchronous transfer between circuits duplicated in the asynchronous clock domains.

    Abstract translation: 在包括分别复制在彼此异步的两个时钟域中的两组电路对的数据处理设备中，在两组电路对之间提供传送有效载荷信号的异步传送电路。 异步传送电路包括两组分别连接到两组电路对的桥接电路，并且在接收侧异步传送有效载荷信号和指示有效载荷信号稳定的时间的控制信号。 两组桥电路和有效载荷信号可以被复制，但是控制信号不被复制，并且所接收的有效载荷信号被用于定时控制以向该对复制电路提供预期的相同时间差。 这使异步时钟域中复制的电路之间的异步传输成为可能。

    COMPUTERSYSTEM UND VERFAHREN FÜR SICHERHEITSKRITISCHE ANWENDUNGEN
    5.
    发明公开
    COMPUTERSYSTEM UND VERFAHREN FÜR SICHERHEITSKRITISCHE ANWENDUNGEN 有权
    COMPUTERSYSTEM联系人VERFAHRENFÜRSICHERHEITSIKRITISCHE ANWENDUNGEN

    公开(公告)号：EP3189436A2

    公开(公告)日：2017-07-12

    申请号：EP15813686.1

    申请日：2015-09-03

    Applicant: FTS Computertechnik GmbH

    Inventor： KOPETZ, Hermann

    IPC: G06F11/07 ,  G06F11/16

    CPC classification number: G06F11/0796 ,  G06F11/0739 ,  G06F11/1641 ,  G06F2201/805

    Abstract: The invention relates to an computer system for carrying out safety-critical applications, said computer system comprising a plurality of node computers and a communication system. Sensor data are supplied in parallel to one or more node computers, the node computers calculating an optimized result, preferably using an optimization algorithm, in order to solve a given problem, and transmitting said optimized result, preferably for checking the safety, to a node computer which is designed as an SCFCU, said SCFCU being directly connected to the actuator controller, and the SCFCU furthermore calculating from the sensor data a simple result, which preferably meets all safety requirements, and an envelope of the simple result, and the SCFCU checking whether the resultant values, particularly those relevant to safety, of the optimized result lie within the envelope of the simple result, and, if this is the case, directly forwarding the optimized result to the actuator controller, and, if this is not the case, forwarding the simple result calculated by the SCFCU directly to the actuator control.

    Abstract translation: 本发明涉及用于执行安全关键应用的计算机系统，所述计算机系统包括多个节点计算机和通信系统。 传感器数据并行地提供给一个或多个节点计算机，节点计算机优选地使用优化算法来计算优化结果，以便解决给定问题，并且优选地为了检查安全性而将所述优化结果传输到节点 计算机被设计为SCFCU，所述SCFCU直接连接到所述致动器控制器，并且所述SCFCU进一步从所述传感器数据计算出简单的结果，所述结果优选地满足所有的安全要求，并且简单结果的包络以及所述SCFCU检查 优化结果的结果值，特别是与安全相关的值是否在简单结果的包络内，并且如果是这种情况，则将优化结果直接转发给致动器控制器，并且如果情况并非如此 ，将由SCFCU计算出的简单结果直接转发给执行器控制。

    Fail safe device and method for operating the fail safe device
    10.
    发明公开
    Fail safe device and method for operating the fail safe device 有权
    Ausfallsichere Vorrichtung und Verfahren zum Betreiben der ausfallsicheren Vorrichtung

    公开(公告)号：EP2824572A1

    公开(公告)日：2015-01-14

    申请号：EP13176326.0

    申请日：2013-07-12

    Applicant: Thales Deutschland GmbH

    Inventor： Ilie, Gabriel Cristian ,  Maringer, Daniel ,  Niedermayer, Klaus ,  Grund, Daniel

    IPC: G06F11/16 ,  G06F11/18

    CPC classification number: G06F11/1608 ,  G06F11/1641 ,  G06F11/184

    Abstract: The invention concerns a fail-safe device for a data output system, the device comprising at least one memory unit (4a, 4b) for storing a set of first telegrams and a set of second telegrams, at least one input processor (1a, 1b) for selecting one of the stored first telegrams and one of the stored second telegrams; and an XOR-device (5) with a first input channel (A) for transmitting the selected first telegram, a second input channel (B) for transmitting the selected second telegram, and with an output channel (O) for transmitting a third telegram, the third telegram being the result of an XOR-operation of the first and the second telegram. Thus a composite fail safe system for Data Output Systems is provided with a simple structure.

    Abstract translation: 本发明涉及一种用于数据输出系统的故障安全装置，该装置包括用于存储一组第一电报和一组第二电报的至少一个存储单元（4a，4b），至少一个输入处理器（1a，1b） ），用于选择所存储的第一电报之一和存储的第二电报之一; 以及具有用于发送所选择的第一电报的第一输入通道（A）的XOR装置（5），用于发送所选择的第二电报的第二输入通道（B）和用于发送第三电报的输出通道（O） ，第三个电报是第一个和第二个电报的异或运算的结果。 因此，数据输出系统的复合故障安全系统具有简单的结构。

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