-
公开(公告)号：EP3450998A1
公开(公告)日：2019-03-06
申请号：EP18191083.7
申请日：2018-08-28
发明人： DANESH, Seyed , STUART, John
摘要： The present disclosure provides a system and method for the management of a monitor module in an electrical measurement system to determine an estimate of a transfer function of a first measurement sensor in the measurement system. The management comprises outputting a first control instruction for instructing the monitor module to determine an estimate of the transfer function of the first measurement sensor over a first individual run length of time, obtaining a first monitor result from the monitor module, the monitor result comprising the estimate of the transfer function of the first measurement sensor and generating a report based at least in part on the first monitor result.
-
公开(公告)号：EP2806462B1
公开(公告)日：2019-02-27
申请号：EP14167969.6
申请日：2014-05-12
IPC分类号： H01L29/87 , H01L27/08 , H01L27/02 , H01L29/10 , H01L21/761 , H01L21/8238
-
公开(公告)号：EP3439183A1
公开(公告)日：2019-02-06
申请号：EP18184791.4
申请日：2018-07-20
摘要： A multiple impedance string, multiple output digital-to-analog converter (DAC) circuit that can include a shared coarse resolution DAC, two first fine resolution DACs to receive outputs of the MSB DAC, and a multiplexer to multiplex outputs of the first and second fine resolution DACs to output terminals. The multiplexer can be configured to interchange coupling of the outputs of the first and second fine resolution DACs using one or more MSBs.
-
公开(公告)号：EP3427073A1
公开(公告)日：2019-01-16
申请号：EP17716987.7
申请日：2017-03-10
发明人： SLATTERY, Colm , KIRBY, Patrick C. , O'GRADY, Albert , O'CONNOR, Denis , COLLINS, Michael , HAMILTON, Valerie , CAHALANE, Aidan J. , BRYCHTA, Michal
IPC分类号： G01R31/317
-
公开(公告)号：EP3157168B1
公开(公告)日：2018-12-26
申请号：EP16193368.4
申请日：2016-10-11
发明人： Pratt, Patrick
CPC分类号： H04B1/0475 , H03F1/3247 , H03F3/19 , H03F3/245 , H03F2200/451 , H03M1/12 , H03M1/66 , H04B2001/0425 , H04L25/03878 , H04L27/368
摘要： Otherwise incompatible digital predistortion and uptilt can be used together, such as in a cable television or other cable communications system having a frequency-dependent signal loss at high frequencies. The predistortion can be used to compensate for a nonlinear gain compression of a power amplifier at higher frequencies. Additional uptilt and equalizer circuits can be included to address deleterious distortion effects that may otherwise arise by using predistortion and uptilt together. Training and adaptation of various components are described. Fine and coarse uptilt adjustments can be provided.
-
公开(公告)号：EP3139506B1
公开(公告)日：2018-11-14
申请号：EP16185018.5
申请日：2016-08-19
发明人： BRESLIN, James
CPC分类号： H03L7/0805 , H03B5/1218 , H03B5/1231 , H03B5/1265 , H03B5/1293 , H03F1/565 , H03F3/191 , H03F3/245 , H03F2200/451 , H03F2200/546 , H03J1/0041 , H03J2200/10 , H04B1/0067
摘要： Provided herein are apparatus and methods for using tuning information to adaptively and dynamically modify the parameters of an RF signal chain. The tuning information from an oscillator core, having multiple oscillators, adaptively tunes parameters of system components within a signal chain. In this way the system components are tuned to operate within a band tailored to the signal and to the oscillator core. In addition, RF impedances can be matched and power added efficiency can be enhanced in an area efficient monolithic integrated circuit.
-
公开(公告)号：EP2827502B1
公开(公告)日：2018-08-01
申请号：EP14173539.9
申请日：2014-06-23
CPC分类号： H03M3/38 , H03M1/1009 , H03M3/392 , H03M3/424 , H03M3/454
摘要： An integrated circuit includes a component calculator (30) configured to compute at least one component value of a highly programmable analog-to-digital converter (ADC) (12) from at least one application parameter, and a mapping module (44) configured to map the component value to a corresponding register setting of the ADC based on at least one process parameter, wherein the integrated circuit produces digital control signals capable of programming the ADC. In a specific embodiment, the component calculator uses an algebraic function of a normalized representation of the application parameter to approximately evaluate at least one normalized ADC coefficient. The component value is further calculated by denormalizing the normalized ADC coefficient. In another specific embodiment, the component calculator uses an algebraic function of the application parameter to calculate the component value. In some embodiments, the integrated circuit further includes a scaling module configured to scale the component value based on scaling parameters.
-
公开(公告)号：EP3129797B1
公开(公告)日：2018-07-11
申请号：EP15715240.6
申请日：2015-04-08
发明人： O'KEEFFE, Conor , MOORE, Joe
CPC分类号： G01R29/10 , H01Q1/00 , H04B1/0466 , H04B1/0483 , H04B17/102 , H04B17/104 , H04B17/12 , H04B17/14 , H04B17/19
摘要： An active antenna test system comprising an active antenna unit comprising: a test signal generator arranged to generate at least a first test signal and at least one second test signal; a plurality of transmitter modules operably coupled to the test signal generator wherein the plurality of transmitter modules are arranged to simultaneously process the first test signal and at least one second test signal to produce at least one radio frequency test signal therefrom; and at least one receiver module arranged to process one or more signals falling in at least one spectral band determined to be susceptible to intermodulation distortion products caused by the at least one radio frequency test signal being generated from the first test signal and at least one second test signal; and an intermodulation determination module operably coupled to the at least one receiver module and arranged to determine a first received intermodulation performance. A first transmitter module of the plurality of transmitter modules is operably uncoupled from the test signal generator and at least a first test signal and at least one second test signal re-applied to the remaining transmitter modules, such that the intermodulation determination module determines a second received intermodulation performance in order to determine an intermodulation distortion contribution of the first transmitter module therefrom.
-
公开(公告)号：EP2830331B1
公开(公告)日：2018-05-23
申请号：EP14176554.5
申请日：2014-07-10
CPC分类号： H04R29/001 , H04R3/007 , H04R3/08
摘要： The present invention relates to a method of controlling sound reproduction of an enclosure mounted electrodynamic loudspeaker and a corresponding sound reproduction assembly. The method of controlling sound reproduction comprises steps of applying an audio signal to a voice coil of the electrodynamic loudspeaker through an output amplifier to produce sound, detecting one of an impedance and admittance of the loudspeaker across a predetermined audio frequency range based on a detected voice coil current and voice coil voltage and determining a fundamental resonance frequency of the loudspeaker based on the detected impedance or admittance. The determined the fundamental resonance frequency of the loudspeaker is compared with a nominal fundamental resonance frequency of the loudspeaker representing a nominal acoustic operating condition of the electrodynamic loudspeaker and a change of acoustic operating condition of the electrodynamic loudspeaker is detected based on a frequency deviation between the determined fundamental resonance frequency and a nominal fundamental resonance frequency of the electrodynamic loudspeaker. The level of the audio signal may be attenuated in response to the frequency deviation meets a predetermined frequency error criterion.
-
公开(公告)号：EP3301835A1
公开(公告)日：2018-04-04
申请号：EP17192905.2
申请日：2017-09-25
发明人： SONG, Xiaopeng , ZHAO, Yiming , WANG, Yi
CPC分类号： H04J3/0647 , H04J3/1652
摘要： Apparatus and methods for asynchronous clock mapping are provided herein. In certain configurations, an upstream server of a transport network generates clock difference data indicating a time difference between a server clock signal and a client clock signal, which have an asynchronous timing relationship with respect to one another. The clock difference data is generated with high precision by using one or more time-to-digital converters (TDCs). The clock difference data is included in a transmitted data stream, and is used by a downstream server to recover client information with enhanced accuracy.
摘要翻译： 这里提供了用于异步时钟映射的装置和方法。 在某些配置中，传输网络的上游服务器生成指示服务器时钟信号与客户端时钟信号之间的时间差的时钟差数据，所述时间差彼此具有异步时序关系。 时钟差数据通过使用一个或多个时间数字转换器（TDC）以高精度生成。 时钟差异数据包含在传输的数据流中，并由下游服务器用来以更高的准确度恢复客户端信息。
-
-
-
-
-
-
-
-
-
搜索结果
112 条记录 (耗时 0.025 秒)
