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    REPLACEMENT METAL GATE TRANSISTORS WITH REDUCED GATE OXIDE LEAKAGE
    2.
    发明公开
    REPLACEMENT METAL GATE TRANSISTORS WITH REDUCED GATE OXIDE LEAKAGE 有权
    WITH REDUCED栅极氧化物LEAK REPLACEMENT金属栅极晶体管

    公开(公告)号：EP1946379A2

    公开(公告)日：2008-07-23

    申请号：EP06836832.3

    申请日：2006-11-02

    申请人： ADVANCED MICRO DEVICES, INC.

    发明人： PAN, James ,  PELLERIN, John

    IPC分类号： H01L29/49 ,  H01L29/51 ,  H01L21/28 ,  H01L21/336

    CPC分类号： H01L21/28008 ,  H01L21/28088 ,  H01L21/28238 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

    摘要： Thin effective gate oxide thickness with reduced leakage for replacement metal gate transistors is achieved by forming a protective layer (70) between the gate oxide layer (12) and metal gate electrode (60), thereby reducing stress. Embodiments include forming a protective layer of amorphous carbon (70) containing metal carbides decreasing in concentration from the metal gate electrode (60) toward the gate oxide layer (12) across the protective layer. Embodiments of methodology include removing the removable gate, depositing a layer of amorphous carbon on the gate oxide layer, forming the metal gate electrode (60) and then heating at an elevated temperature to diffuse metal from the metal gate electrode into the amorphous carbon layer (70), thereby forming the metal carbides. Embodiments also include metal gate transistors with a gate oxide layer (82) having a high dielectric constant and silicon concentrated at the interfaces with the metal gate electrode (100) and substrate (10).

    METHOD OF MAKING DUAL-METAL CMOS TRANSISTORS WITH TUNABLE GATE ELECTRODE WORK FUNCTION
    3.
    发明授权
    METHOD OF MAKING DUAL-METAL CMOS TRANSISTORS WITH TUNABLE GATE ELECTRODE WORK FUNCTION 有权
    FOR双金属CMOS晶体管的方法可调谐栅电极的功函数

    公开(公告)号：EP1741132B1

    公开(公告)日：2009-09-23

    申请号：EP05736767.4

    申请日：2005-04-19

    申请人： ADVANCED MICRO DEVICES, INC.

    发明人： PAN, James ,  LIN, Ming-Ren

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823835 ,  H01L21/28097 ,  H01L21/823842

    摘要： A dual-metal CMOS arrangement and method of making the same provides a substrate (10) and a plurality of NMOS devices (44) and PMOS devices (46) formed on the substrate (10). Each of the plurality of NMOS devices (44) and PMOS devices (46) have gate electrodes. Each NMOS gate electrode includes a first silicide region (50) on the substrate (10) and a first metal region (48) on the first silicide region (50). The first silicide region (50) of the NMOS gate electrode consists of a first silicide (50) having a work function that is close to the conduction band of silicon. Each of the PMOS gate electrodes includes a second silicide region (54) on the substrate and a second metal region (52) on the second silicide region (54). The second silicide region (54) of the PMOS gate electrode consists of a second silicide (54) having a work function that is close to the valence band of silicon.

    MULTI-OPERATIONAL MODE TRANSISTOR WITH MULTIPLE-CHANNEL DEVICE STRUCTURE
    4.
    发明公开
    MULTI-OPERATIONAL MODE TRANSISTOR WITH MULTIPLE-CHANNEL DEVICE STRUCTURE 审中-公开
    与多通道器件的结构和方法多种模式晶体管

    公开(公告)号：EP1958263A1

    公开(公告)日：2008-08-20

    申请号：EP06837646.6

    申请日：2006-11-15

    申请人： ADVANCED MICRO DEVICES, INC.

    发明人： PAN, James ,  PELLERIN, John

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/7838 ,  H01L29/66628 ,  H01L29/7834

    摘要： A multiple operating mode transistor is provided in which multiple channels (15) having different respective operational characteristics are employed. Multiple channels (15) have threshold voltages that are independently adjustable. The independent adjustment of the threshold voltage includes providing at least one of different respective doping concentrations in the different channels (15), different respective gate dielectric thicknesses for the different gate dielectrics (14a-14c) separating the channels (15), and different respective silicon channel thicknesses for the different channels (15).

    DUAL-METAL CMOS TRANSISTORS WITH TUNABLE GATE ELECTRODE WORK FUNCTION AND METHOD OF MAKING THE SAME
    5.
    发明公开
    DUAL-METAL CMOS TRANSISTORS WITH TUNABLE GATE ELECTRODE WORK FUNCTION AND METHOD OF MAKING THE SAME 有权
    FOR双金属CMOS晶体管的方法可调谐栅电极的功函数

    公开(公告)号：EP1741132A1

    公开(公告)日：2007-01-10

    申请号：EP05736767.4

    申请日：2005-04-19

    申请人： ADVANCED MICRO DEVICES, INC.

    发明人： PAN, James ,  LIN, Ming-Ren

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823835 ,  H01L21/28097 ,  H01L21/823842

    摘要： A dual-metal CMOS arrangement and method of making the same provides a substrate (10) and a plurality of NMOS devices (44) and PMOS devices (46) formed on the substrate (10). Each of the plurality of NMOS devices (44) and PMOS devices (46) have gate electrodes. Each NMOS gate electrode includes a first silicide region (50) on the substrate (10) and a first metal region (48) on the first silicide region (50). The first silicide region (50) of the NMOS gate electrode consists of a first silicide (50) having a work function that is close to the conduction band of silicon. Each of the PMOS gate electrodes includes a second silicide region (54) on the substrate and a second metal region (52) on the second silicide region (54). The second silicide region (54) of the PMOS gate electrode consists of a second silicide (54) having a work function that is close to the valence band of silicon.