公开(公告)号：EP3916808B1

公开(公告)日：2024-11-13

申请号：EP21183275.3

申请日：2014-12-02

发明人： STEIGERWALD, Joseph M. ,  GHANI, Tahir ,  HU, Jenny ,  POST, Ian R.C.

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L29/51 ,  H01L29/49 ,  H01L21/8234 ,  H01L29/423 ,  H01L21/8238 ,  H01L29/786 ,  H01L27/088 ,  H01L27/092

公开(公告)号：EP4420169A1

公开(公告)日：2024-08-28

申请号：EP22797360.9

申请日：2022-09-29

申请人： International Business Machines Corporation

发明人： CHENG, Kangguo

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L29/49

CPC分类号： H01L29/66795 ,  H01L29/785 ,  H01L29/4991 ,  H01L29/6656 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/165 ,  H01L29/161 ,  H01L29/41775

公开(公告)号：EP4413615A1

公开(公告)日：2024-08-14

申请号：EP22799911.7

申请日：2022-10-04

申请人： International Business Machines Corporation

发明人： ZHOU, Huimei ,  SONG, Yi ,  BASKER, Veeraraghavan ,  DURFEE, Curtis ,  SIDDIQUI, Shahab

IPC分类号： H01L29/49 ,  H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7827 ,  H01L29/4991 ,  H01L29/66666

公开(公告)号：EP4272248A1

公开(公告)日：2023-11-08

申请号：EP21916136.1

申请日：2021-10-19

申请人： Applied Materials, Inc.

发明人： BATRA, Shubneesh ,  SEE, Guan Huei

IPC分类号： H01L21/8234 ,  H01L29/66 ,  H01L29/49 ,  H01L29/417 ,  H01L29/24 ,  H01L23/528 ,  H01L23/31

公开(公告)号：EP3965143B1

公开(公告)日：2023-10-18

申请号：EP21802178.0

申请日：2021-05-24

发明人： WU, Gongyi ,  YU, Youquan ,  LU, Yong

IPC分类号： H01L21/28 ,  H01L29/49

公开(公告)号：EP4246592A1

公开(公告)日：2023-09-20

申请号：EP22209674.5

申请日：2022-11-25

申请人： Samsung Electronics Co., Ltd.

发明人： YOON, Taekyung ,  KIM, Youngjun ,  BARK, Hunyoung ,  LEE, Eun-Ok ,  LEE, Jaejin ,  CHANG, Dongju

IPC分类号： H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78 ,  H10B12/00 ,  H01L21/28 ,  H01L21/285

摘要： Provided is a method of fabricating a semiconductor device including forming a device isolation layer defining active regions on a substrate and forming gate lines intersecting the active regions and buried in the substrate. The forming of the gate lines includes forming a trench crossing the active regions in the substrate, forming a conductive layer filling the trench, and performing a heat treatment process on the conductive layer. The conductive layer includes a nitride of a first metal. Nitrogen atoms in the conductive layer are diffused toward an outer surface and a lower surface of the conductive layer by the heat treatment process.

公开(公告)号：EP4220736A3

公开(公告)日：2023-08-09

申请号：EP23153062.7

申请日：2023-01-24

申请人： Samsung Electronics Co., Ltd.

发明人： KIM, Sangwook ,  BYUN, Kyung-Eun ,  SHIN, Keunwook ,  JUNG, Moonil ,  KIM, Euntae ,  YANG, Jeeeun ,  LEE, Kwanghee

IPC分类号： H01L29/786 ,  H01L29/49

摘要： A transistor includes an oxide semiconductor layer, a source electrode and a drain electrode disposed spaced apart from each other on the oxide semiconductor layer, a gate electrode spaced apart from the oxide semiconductor layer, a gate insulating layer disposed between the oxide semiconductor layer and the gate electrode, and a graphene layer disposed between the gate electrode and the gate insulating layer and doped with a metal.

公开(公告)号：EP4064364A1

公开(公告)日：2022-09-28

申请号：EP21164244.2

申请日：2021-03-23

申请人： Infineon Technologies Austria AG

发明人： WEBER, Hans ,  KAMMERLANDER, David ,  RIEGLER, Andreas

IPC分类号： H01L29/739 ,  H01L29/78 ,  H01L29/423 ,  H01L29/40 ,  H01L29/06 ,  H01L29/49

摘要： A semiconductor device is proposed. An example of a semiconductor device (100) includes a semiconductor body (102) having a first main surface (104). A trench structure (106) extends into the semiconductor body (102) from the first main surface (104). The trench structure (106) includes a trench electrode structure (108) and a trench dielectric structure (110). The trench dielectric structure (110) includes a gate dielectric (1101) in an upper part (110a) of the trench dielectric structure (110) and a gap (1102) in a lower part (110b) of the trench dielectric structure (110). The semiconductor device (100) further includes a body region (112) adjoining the gate dielectric (1101) at a sidewall (114) of the trench structure (106) in the upper part (110a) of the trench dielectric structure (110). The gate dielectric (1101) extends deeper into the semiconductor body (102) along the sidewall (114) than the body region (112).

公开(公告)号：EP2736077B1

公开(公告)日：2022-07-06

申请号：EP13193660.1

申请日：2013-11-20

发明人： Shi, Lei

IPC分类号： H01L29/49 ,  H01L29/66 ,  H01L29/786

公开(公告)号：EP4012781A1

公开(公告)日：2022-06-15

申请号：EP21198859.7

申请日：2021-09-24

申请人： INTEL Corporation

发明人： KOTLYAR, Roza ,  BOJARSKI, Stephanie A ,  GEORGE, Hubert C ,  AMIN, Payam ,  KEYS, Patrick H ,  PILLARISETTY, Ravi ,  CAUDILLO, Roman ,  LUETHI, Florian ,  CLARKE, James S

IPC分类号： H01L29/06 ,  H01L29/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/76 ,  B82Y10/00

摘要： Disclosed herein are lateral gate material arrangements for quantum dot devices, as well as related computing devices and methods. The quantum dot device may include: a quantum well stack; and a gate above the quantum well stack, wherein the gate includes a gate electrode (113, 117), the gate electrode includes a first conductive gate electrode material (113) proximate to side faces of the gate and a second conductive gate electrode material (117) proximate to a center of the gate, and the first gate material has a different material composition than the second gate material, in particular a different work function.