摘要:
In a method for reducing the phase noise introduced by pointer justifications from a synchronous digital hierarchy network in a transmitted numerical signal, occasional redundancies associated with bit justifications and fixed redundancies are combined with occasional prefiltered redundancies associated with the pointer justifications, and the combined signal is filtered in an analog phase locked loop. The occasional redundancies associated with the pointer justifications and at least part of the fixed redundancies with or without bit justifications are prefiltered in two stages, and the prefiltered signals are combined with the eventual occasional redundancies associated with the bit justifications only in case these occasional redundancies were not prefiltered.
摘要:
The present invention provides for a method and apparatus for carrying out connection and related input/output processing functions in a Sinchronous Digital Hierarchy (SDH/SONET) transport node (network), in which the payload switching matrices (e.g. MSPC and HPC matrices for an High Order VC system) collapse into one single functional block (MTRX), while the Virtual Container (VCs) monitoring functions (HVC_RX, HVC_TX) are shifted to the Input/Output position of the matrices.
摘要:
A method is disclosed for digitally measuring the phase of a data signal with frequency fx in a transmission network. The method comprises the following steps: providing a counter; increasing the counter upon each occurrence of an event marking the evolution of the data signal with frequency fx and sampling the counter at a first sampling frequency fc, thus obtaining a first sample sequence. According to the method of the invention, the first sample frequency fc is uncorrelated from the frequency fx. The method according to the invention further comprises the steps of sampling the first sample sequence at a second sampling frequency fs, thus obtaining a second sample sequence; and digitally processing said second sample sequence in order to estimate said phase of said data signal. Preferably, said counter is sampled at a frequency fc with fc=α·fx, where α is an irrational number.
摘要:
Disclosed is a device and method for processing a frame including overhead and payload, the device comprising: a first hardware module for processing the payload, the payload processing comprising termination/adaptation and cross-connection functions; and a second hardware module for processing at least a part of overhead, wherein said second hardware module cooperates with the first hardware module for controlling the payload cross-connection and consequent actions.
摘要:
A method is described for changing the order of bytes of digital signals transmitted in frames according to a cyclic rotation of the bytes and for changing the frame format. This method can advantageously be used in a concatenated coding scheme, e.g a serial concatenation of two Reed-Solomon codes, to achieve the best trade off between coding gain and line bit rate. The disclosed interleaving method is applicable to optical transport networks.