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    Method of programming floating gate memory devices
    2.
    发明公开
    Method of programming floating gate memory devices 失效
    Programmierungsverfahrenfürschwebende Forspeicheranordnungen。

    公开(公告)号：EP0516296A2

    公开(公告)日：1992-12-02

    申请号：EP92304071.1

    申请日：1992-05-06

    申请人： ALTERA CORPORATION

    发明人： Norman, Kevin Alan

    IPC分类号： G11C16/06

    CPC分类号： G11C16/10

    摘要： Improved methods of programming floating gate memory devices such as MOS EPROMs having a gate, a floating gate, a read channel, and a write or programming channel. Potential is applied to the read channel (which is normally inactive during programming) in order to increase the voltage induced on the floating gate by the programming voltage applied to the gate. This makes it possible to reduce the programming voltage which must be applied to the gate, to reduce the time required to program the device, or to achieve some measure of both of these benefits.

    摘要翻译： 编程浮动栅极存储器件（例如具有栅极，浮动栅极，读取通道和写入或编程通道的MOS EPROM）的改进的方法。 电位被施加到读通道（在编程期间通常不起作用），以便通过施加到栅极的编程电压来增加在浮栅上感应的电压。 这使得可以降低必须施加到门的编程电压，以减少编程器件所需的时间，或者实现这两个优点的一些测量。

    Programmable logic device with programmable word line connections
    3.
    发明公开
    Programmable logic device with programmable word line connections 失效
    具有可编程字线连接的可编程逻辑器件

    公开(公告)号：EP0340891A3

    公开(公告)日：1991-01-16

    申请号：EP89301781.4

    申请日：1989-02-23

    申请人： ALTERA CORPORATION

    发明人： Norman, Kevin Alan ,  Frankovich, Robert J.

    IPC分类号： H03K19/177

    CPC分类号： H03K19/17736 ,  H03K19/17704 ,  H03K19/17728 ,  H03K19/1774

    摘要： A programmable logic device having a relatively small number of programmable product terms (0E,SETN,INV,P0,P1,P2,ACLK,CLEARN) ("P-terms") feeding each fixed combinatorial logic device (51), and additional "expander" programmable P-terms (EXP1,EXP2) which do not directly feed a fixed device. Relatively simple logic functions can be performed by suitably programming the P-terms feeding the fixed devices. More complex logic functions can be performed by suitably programming the required number of expander P-terms, and then combining the outputs of those P-terms by means of another P-term. In order to conserve word lines in the programmable array, multi­plexers (150) allow selection of whether expander outputs or external inputs (44) will be applied to certain word lines (102).

    Method of programming floating gate memory devices
    4.
    发明公开
    Method of programming floating gate memory devices 失效
    浮动栅格存储器件编程方法

    公开(公告)号：EP0516296A3

    公开(公告)日：1993-10-06

    申请号：EP92304071.1

    申请日：1992-05-06

    申请人： ALTERA CORPORATION

    发明人： Norman, Kevin Alan

    IPC分类号： G11C16/06

    CPC分类号： G11C16/10

    摘要： Improved methods of programming floating gate memory devices such as MOS EPROMs having a gate, a floating gate, a read channel, and a write or programming channel. Potential is applied to the read channel (which is normally inactive during programming) in order to increase the voltage induced on the floating gate by the programming voltage applied to the gate. This makes it possible to reduce the programming voltage which must be applied to the gate, to reduce the time required to program the device, or to achieve some measure of both of these benefits.

    Multifunction flip-flop-type circuit
    5.
    发明公开
    Multifunction flip-flop-type circuit 失效
    多功能FLIP-FLOP-TYPE电路

    公开(公告)号：EP0350141A3

    公开(公告)日：1990-10-10

    申请号：EP89301782.2

    申请日：1989-02-23

    申请人： ALTERA CORPORATION

    发明人： Norman, Kevin Alan ,  So, Hock-Chuen ,  Veenstra, Kerry Scott ,  Wong, Sau-Ching

    IPC分类号： H03K3/037

    CPC分类号： H03K3/037

    摘要： A flip-flop-type circuit capable of operat­ing either as a conventional D flip-flop or as a device which merely passes through the data applied to it (so-called "flow-through mode"). In the flow-­through mode, the circuit has the additional capability of being able to latch in the data flowing through it at any time. Thus the circuit can also operate as a level-sensitive latch.

    Multifunction flip-flop-type circuit
    6.
    发明公开
    Multifunction flip-flop-type circuit 失效
    Multifunktions-Schaltung des Flip-Flop-Typs。

    公开(公告)号：EP0350141A2

    公开(公告)日：1990-01-10

    申请号：EP89301782.2

    申请日：1989-02-23

    申请人： ALTERA CORPORATION

    发明人： Norman, Kevin Alan ,  So, Hock-Chuen ,  Veenstra, Kerry Scott ,  Wong, Sau-Ching

    IPC分类号： H03K3/037

    CPC分类号： H03K3/037

    摘要： A flip-flop-type circuit capable of operat­ing either as a conventional D flip-flop or as a device which merely passes through the data applied to it (so-called "flow-through mode"). In the flow-­through mode, the circuit has the additional capability of being able to latch in the data flowing through it at any time. Thus the circuit can also operate as a level-sensitive latch.

    摘要翻译： 一种触发器型电路，其能够作为传统的D触发器或只是通过施加到其上的数据的设备（所谓的“流通模式”）。 在流通模式中，电路具有能够随时锁定流过它的数据的额外能力。 因此，电路也可以作为电平敏感锁存器工作。

    Programmable logic device with programmable word line connections
    9.
    发明公开
    Programmable logic device with programmable word line connections 失效
    Programmierbare logische Vorrichtung mit programmierbaren Wortlinien-Verbindungen。

    公开(公告)号：EP0340891A2

    公开(公告)日：1989-11-08

    申请号：EP89301781.4

    申请日：1989-02-23

    申请人： ALTERA CORPORATION

    发明人： Norman, Kevin Alan ,  Frankovich, Robert J.

    IPC分类号： H03K19/177

    CPC分类号： H03K19/17736 ,  H03K19/17704 ,  H03K19/17728 ,  H03K19/1774

    摘要： A programmable logic device having a relatively small number of programmable product terms (0E,SETN,INV,P0,P1,P2,ACLK,CLEARN) ("P-terms") feeding each fixed combinatorial logic device (51), and additional "expander" programmable P-terms (EXP1,EXP2) which do not directly feed a fixed device. Relatively simple logic functions can be performed by suitably programming the P-terms feeding the fixed devices. More complex logic functions can be performed by suitably programming the required number of expander P-terms, and then combining the outputs of those P-terms by means of another P-term. In order to conserve word lines in the programmable array, multi­plexers (150) allow selection of whether expander outputs or external inputs (44) will be applied to certain word lines (102).

    摘要翻译： 一种可编程逻辑器件，其具有相对较少数量的可编程产品项（0E，SETN，INV，P0，P1，P2，ACLK，CLEARN）（“P项”），馈送每个固定的组合逻辑器件（51） 扩展器“可编程P项（EXP1，EXP2），不直接馈送固定设备。 可以通过对馈送固定设备的P项进行适当编程来执行相对简单的逻辑功能。 可以通过适当地编程所需数量的扩展器P-项来执行更复杂的逻辑功能，然后通过另一个P项组合这些P项的输出。 为了节省可编程阵列中的字线，多路复用器（150）允许选择扩展器输出或外部输入（44）是否将被施加到某些字线（102）。