公开(公告)号：EP1256978A3

公开(公告)日：2005-02-02

申请号：EP02253261.8

申请日：2002-05-09

申请人： ASM JAPAN K.K.

发明人： Matsuki, Nobuo ,  Umemoto, Seijiro ,  Hyoudo, Yasuyoshi

IPC分类号： H01L21/316 ,  H01J37/32

CPC分类号： H01J37/32522 ,  C23C16/509 ,  H01J37/32082 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02203 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/31608

摘要： A thin film having a low dielectric constant is formed on a semiconductor substrate by plasma reaction using a method including the steps of: (i) introducing a reaction gas into a reaction chamber for plasma CVD processing wherein a semiconductor substrate is placed on a lower stage; and (ii) forming a thin film on the substrate by plasma reaction while reducing or discharging an electric charge from the substrate surface. In the reaction chamber, an upper region for plasma excitation and a lower region for film formation on the substrate are formed. An intermediate electrode is used to divide the interior of the reaction chamber into the upper region and the lower region. The discharge can also be conducted by lowering the temperature of the lower stage to condense moisture molecules on the substrate surface, especially by using a cooling plate disposed between the intermediate electrode and the lower stage.

公开(公告)号：EP1256978A2

公开(公告)日：2002-11-13

申请号：EP02253261.8

申请日：2002-05-09

申请人： ASM JAPAN K.K.

发明人： Matsuki, Nobuo ,  Umemoto, Seijiro ,  Hyoudo, Yasuyoshi

IPC分类号： H01L21/316

CPC分类号： H01J37/32522 ,  C23C16/509 ,  H01J37/32082 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02203 ,  H01L21/02274 ,  H01L21/02337 ,  H01L21/31608

摘要： A thin film having a low dielectric constant is formed on a semiconductor substrate by plasma reaction using a method including the steps of: (i) introducing a reaction gas into a reaction chamber for plasma CVD processing wherein a semiconductor substrate is placed on a lower stage; and (ii) forming a thin film on the substrate by plasma reaction while reducing or discharging an electric charge from the substrate surface. In the reaction chamber, an upper region for plasma excitation and a lower region for film formation on the substrate are formed. An intermediate electrode is used to divide the interior of the reaction chamber into the upper region and the lower region. The discharge can also be conducted by lowering the temperature of the lower stage to condense moisture molecules on the substrate surface, especially by using a cooling plate disposed between the intermediate electrode and the lower stage.

摘要翻译： 具有低介电常数的薄膜是形成在由等离子体反应，使用一种方法，包括的步骤的半导体衬底：（i）将反应气体引入worin一个半导体衬底上的下段放置等离子体CVD处理的反应室 ; 和（ii）由等离子体反应形成在基板上的薄膜，同时减少或从表面基材电荷的放电。 在用于等离子体激发上部区域中的反应室和用于在基片上成膜的下部区域中形成。 中间电极被用来划分反应室到上部区域的内部和下部区域中。 放电因此，可以通过降低下阶段的温度凝结在基板表面的水分的分子中进行，通过使用中间电极与所述下段之间设置一冷却板爱更是如此。