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公开(公告)号：EP1386402B1
公开(公告)日：2008-11-05
申请号：EP02769266.4
申请日：2002-04-12
申请人： Analog Devices, Inc.
CPC分类号： H03M1/0678 , H03M1/36
摘要： An integrated circuit including a number of repetitive cells for producing output signals in response to respective inputs, each cell(14,16,18) having associated with it an output circuit responsive to the cell output signal to produce an output circuit output signal, each of the output circuits including a circuit device having two terminals to provide for the flow therethrough of a current from an associated current supply(137) and producing a corresponding output signal; the improvement for producing the effectsof cell mismatch and output circuit mismatch including an impedance network(150), having a set of impedance elements each connected between corresponding terminals or respective pairs of the circuits with each circuit device forming a part of a respective output circuit(110,112), the impedance elements reducing the efforts of cell mismatch and output circuit mismatch on the output signals; there maybe one impedance network which accommodates mismatch es in both the cell and output circuits or there may be one impedance network to accommodate cell mismatch and another to accommodate output circuit mismatch.
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公开(公告)号：EP1386402A1
公开(公告)日：2004-02-04
申请号：EP02769266.4
申请日：2002-04-12
申请人： Analog Devices, Inc.
IPC分类号： H03M1/36
CPC分类号： H03M1/0678 , H03M1/36
摘要： An integrated circuit including a number of repetitive cells for producing output signals in response to respective inputs, each cell(14,16,18) having associated with it an output circuit responsive to the cell output signal to produce an output circuit output signal, each of the output circuits including a circuit device having two terminals to provide for the flow therethrough of a current from an associated current supply(137) and producing a corresponding output signal; the improvement for producing the effectsof cell mismatch and output circuit mismatch including an impedance network(150), having a set of impedance elements each connected between corresponding terminals or respective pairs of the circuits with each circuit device forming a part of a respective output circuit(110,112), the impedance elements reducing the efforts of cell mismatch and output circuit mismatch on the output signals; there maybe one impedance network which accommodates mismatch es in both the cell and output circuits or there may be one impedance network to accommodate cell mismatch and another to accommodate output circuit mismatch.
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