摘要:
The present invention relates to a method for DC/DC conversion which comprises the steps of controlling a first switch (10) for coupling a supply terminal (5) to a first terminal (60) of an inductor (2) and a second switch (20) for coupling the first terminal (60) to a ground potential terminal (8). The method further comprises controlling a third switch (30) for coupling a second terminal (61) of the inductor (2) to the ground potential terminal (8) and a fourth switch (40) for coupling the second terminal (61) to an output terminal (6). A control sequence is used to control the four switches (10, 20, 30, 40) using four switching phases (A, B, C, D). A maximum of two switches out of the four switches (10, 20, 30, 40) change their switching position at a respective transition of subsequent switching phases (A, B, C, D).
摘要:
A touch sensing system comprises a signal generator (Tx), which is configured to provide an AC signal, a signal receiver (Rx), which is configured to perform a signal detection, a first transmitter node (T1), which is connected to the signal generator (Tx) in a switchable fashion, a second transmitter node (T2), which is connected to the first transmitter node (T1) in a switchable fashion and to a reference potential terminal (GND) in a switchable fashion, a first receiver node (R1), which is connected to the signal receiver (Rx) in a switchable fashion and to the first transmitter node (T1) in a switchable fashion, a second receiver node (R2), which is connected to the first receiver node (R1) in a switchable fashion and to the reference potential terminal (GND) in a switchable fashion, a first electrode (E1), which is connected to the second transmitter node (T2) in a switchable fashion, a second electrode (E2), which is connected to the second receiver node (R2) in a switchable fashion, and a capacitance measurement circuit (CMC). The capacitance measurement circuit (CMC) is coupled to the first transmitter node (T1) and/or the second transmitter node (T2), coupled to the first receiver node (R1) and/or the second receiver node (R2), and configured to measure respective capacitance values at the first transmitter node (T1) or the second transmitter node (T2) and at the first receiver node (R1) or the second receiver node (R2 ) .
摘要:
A voltage converter (10) comprises an input (11) for receiving an input voltage (VIN), a first output (12) for providing a first output voltage (VPOS) and a second output (13) for providing a second output voltage (VNEG). The first output voltage (VPOS) and the second output voltage (VNEG) have opposite polarities. A switching arrangement (14) of the voltage converter (10) is designed to provide energy to an inductor (15) in a charging phase (A) of operation and to provide energy from the inductor (15) to the first output (12) and, via a flying capacitor (16), to the second output (13) in a discharging phase of operation. The first duration (t1) of the charging phase (A) of operation is controlled such that the difference between a first predetermined value and the sum of the absolute value of the first output voltage (VPOS) and of the second output voltage (VNEG) is minimized.
摘要:
A filtering arrangement comprises a reference voltage input (1) and a compensation current arrangement (10) coupled to the reference voltage input (1) and configured to provide a control current at a current output (2) as a function of a voltage at the reference voltage input (1). The filtering arrangement also comprises a first and a second current source (20, 30) each having a control input (4, 5) coupled to the current output (2), a first and a second filter input (7, 8), and a first transistor (T1) and a second transistor (T2). The first transistor (T1) has a first connection (T11), a second connection (T12) and a control connection (T1c), where its first connection (T11) is coupled to the first current source (20) and its second connection (T12) is coupled to the first filter input (7) through a first resistor (R1). The second transistor (T2) has a first connection (T21), a second connection (T22) and a control connection (T2c), where its first connection T21) is coupled to the second current source (30), its second connection (T22) is coupled to the second filter input (8) through a second resistor (R2) and its control connection (T2c) is coupled to its first connection (T21) and to the control connection (T1c) of the first transistor (T1). A capacitive element (C1) is coupled between the first connection (T11) of the first transistor (T1) and the second connection (T22) of the second transistor (T2) and a filter output (6) is coupled to the first connection (T11) of the first transistor (T1).
摘要:
A controlled charge pump arrangement comprises a clocked charge pump (20) comprising a control input (D) and adapted to provide an output voltage (VOUT). A first feedback control circuit (40) is coupled to that control input (D) and comprises a proportional signal of transfer characteristics. The controlled charge pump arrangement also comprises a second feedback control circuit (30) coupled to that control input (D) and having an integrating signal transfer characteristic.
摘要:
A regulated current source comprises a controllable output means (Mp) and a first regulation loop with a first comparing means to provide a control signal to the controllable output means. A first switch is arranged between the controllable output means and an output of the first comparing means. The current source also comprises an offset cancellation loop having second comparing means coupled with its input to the output of the first comparing means. A unity gain buffer is coupled to a node between the first switch and the controllable output means and selectively switchable arranged in parallel to the first switch.
摘要:
A band gap reference circuit comprises a first branch (1) having a first transistor (Q1) and a first temperature-dependent resistive element (SO). A second branch of the band gap reference comprises a second transistor (Q2) having a different size compared to the first transistor (Q1). An output branch (3) comprises a second temperature-dependent resistive element (S1, S2), that second temperature-dependent resistive element being coupled to an output terminal (Vref). At least one of the first and second temperature-dependent resistive elements (S0, S1 S2) comprises a transistor (M2) being arranged in a current path of the respective branch (1, 3) and being controlled such that it operates in a linear region of its characteristics.