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公开(公告)号：EP3907759A1
公开(公告)日：2021-11-10
申请号：EP19829390.4
申请日：2019-01-04
发明人： XU, Zhuo , BAI, Yajie , WANG, Xiaolin , MA, Tongguo , GE, Yongli
IPC分类号： H01L23/60 , H01L27/12 , G02F1/1362
摘要： An electrostatic discharge protection circuit, a display substrate and a display apparatus are disclosed. The electrostatic discharge protection circuit includes: a first conductive portion, having an end portion; and at least one electrostatic discharge portion, arranged on a same layer as the first conductive portion and spaced from the end portion of the first conductive portion, the at least one electrostatic discharge portion being configured to discharge electrostatic charges generated at the end portion of the first conductive portion. The electrostatic discharge portion is positioned near the end portion of the first conductive portion, and the electrostatic charges accumulated at the end portion can be discharged by the electrostatic discharge portion, and thus, the electrostatic discharge portion can share a breakdown current so as to prevent static electricity from entering other effective circuits.
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公开(公告)号：EP3678124A1
公开(公告)日：2020-07-08
申请号：EP18800027.7
申请日：2018-04-27
发明人： XU, Zhuo , BAI, Yajie , WU, Hailong , ZHOU, Yan , LIANG, Peng , RAN, Min , ZHU, Haipeng
IPC分类号： G09G3/36
摘要： A shift register unit, a driving device, a display device and a driving method are disclosed. The shift register unit (10) includes a first circuit unit (100) and a second circuit unit (200); the first circuit unit (100) includes an input terminal (INPUT), a reset terminal (RESET), a clock signal terminal (CLK), a first voltage terminal (VGH), a second voltage terminal (VGL) and a first output terminal (OUTPUT), and is configured to output a first output signal of the shift register unit (10) from the first output terminal (OUTPUT); the second circuit unit includes a third voltage terminal (VGH2), a fourth voltage terminal (VGL2) and a second output terminal (OUTPUT2), and is configured to output a second output signal of the shift register unit (10) from the second output terminal (OUTPUT2), at least under the control of the first output signal; and the second output signal and the first output signal are mutually phase-inverted signals.
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3.发明公开
公开(公告)号：EP3535783A1
公开(公告)日：2019-09-11
申请号：EP16905685.0
申请日：2016-11-02
发明人： XU, Zhuo , BAI, Yajie , WANG, Xiaolin , WANG, Rui , SHANG, Fei , QIU, Haijun
IPC分类号： H01L27/12
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公开(公告)号：EP3537210A1
公开(公告)日：2019-09-11
申请号：EP17829905.3
申请日：2017-06-30
发明人： XU, Zhuo , BAI, Yajie , WANG, Xiaoyuan , WANG, Rui , KIM, Jaikwang , SHANG, Fei
IPC分类号： G02F1/1362 , G02F1/1368 , G09G3/36
摘要： An array substrate is described, which has a display area and a non-display area in the periphery of the display area, and comprises: a plurality of gate lines to which gate pulse signals are provided; a plurality of data lines to which data signals are provided, wherein signals on adjacent ones of said plurality of data lines have opposite polarities; a charge sharing device comprising a first thin film transistor in the non-display area, a first terminal of said first thin film transistor being connected to one of two adjacent data lines among said plurality of data lines, a second terminal thereof being connected the other of the two adjacent data lines, and a gate thereof being configured to be provided with a first control signal in a blank time period between adjacent data frames so as to turn on said first thin film transistor. In this way, charge sharing during polarity reversal of the data lines can be realized by a cheap and simple structure, thus saving electrical power consumption.
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公开(公告)号：EP3343284A1
公开(公告)日：2018-07-04
申请号：EP16791294.8
申请日：2016-01-26
发明人： WANG, Xiaoyuan , WANG, Wu , KIM, Jaikwang , XU, Zhuo , BAI, Yajie
IPC分类号： G02F1/1362 , G02F1/1368 , G02F1/133 , G09G3/36
CPC分类号： G09G3/3611 , G02F1/133 , G02F1/13306 , G02F1/1343 , G02F1/1362 , G02F1/136286 , G02F1/1368 , G09G3/3614 , G09G3/3659 , G09G2300/0426 , G09G2310/0264 , G09G2320/0247
摘要： The embodiments of the present invention disclose an array substrate, a display device and a driving method thereof. The array substrate comprises a plurality of gate lines extending in a first direction, a plurality of data lines extending in a second direction crossing the first direction, and a plurality of pixel units arranged as an array along the first direction and the second direction. Each of the plurality of data lines is arranged between two columns of the pixel units, the two columns of the pixel units extending in the second direction and being adjacent to each other in the first direction, and the data line is connected to pixel units at one side of said data line or to pixel units at the other side of said data line. Each of the plurality of data lines switches the direction of connection from one side to the other in an alternating manner with each two adjacent rows of pixel units, and the plurality of data lines have the same connection direction in each row of pixel units.
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公开(公告)号：EP3913609A1
公开(公告)日：2021-11-24
申请号：EP19836778.1
申请日：2019-01-16
发明人： BAI, Yajie , XU, Zhuo , ZHAO, Jingpeng , WANG, Wu , WANG, Xiaoyuan , BI, Ruilin
摘要： A shift register, a driving method thereof and a device are provided. A shift register sub-circuit outputs a gate scanning signal, to dive gate lines. The shift register sub-circuit outputs a touch scanning signal to a touch control circuit, so that the touch control circuit conducts a touch electrode with a touch detection signal terminal in response to the touch scanning signal, and thus, touch driving may be performed. Therefore, the shift register provided by the embodiment of the disclosure is not only capable of realizing scanning driving, but also capable of realizing the touch driving of touch electrodes. In addition, the number of arranged touch detection lines may be reduced, and furthermore, the area of a Fan-out region and the area of a non-display region are reduced.
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公开(公告)号：EP3360163A1
公开(公告)日：2018-08-15
申请号：EP16816171.9
申请日：2016-05-20
发明人： BAI, Yajie , XU, Zhuo , WANG, Xiaoyuan , KIM, Jaikwang
IPC分类号： H01L27/32
CPC分类号： H01L27/3218 , H01L27/13 , H01L27/18 , H01L27/3213 , H01L51/56
摘要： The present disclosure provides a pixel structure and a fabricating method thereof, as well as a display panel and a display apparatus. The pixel structure includes a plurality of pairs of pixels in a matrix having rows and columns; each pixel is shaped as a right triangle and corresponds to one of four different colors; each pair of pixels is at an intersection between a row and a column and comprises two pixels of different colors; and two pairs of pixels at two neighboring intersections along a direction of the rows or along a direction of the columns comprise four pixels of different colors. Each pair of pixels can have a combined shape of a rectangle, which can form a virtual pixel unit. Adjacent four pixels of four different colors have a combined shape of diamond, which can form a physical pixel unit.
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8.发明公开
公开(公告)号：EP3770897A1
公开(公告)日：2021-01-27
申请号：EP19771375.3
申请日：2019-03-22
发明人： XU, Zhuo , ZHANG, Yuanbo , BAI, Yajie , ZHU, Haipeng , ZHOU, Yan , WU, Hailong , KIM, Heecheol , RAN, Min
IPC分类号： G09G3/36
摘要： A shift register circuit, comprising a first circuit 10, M second circuits 20, and N third circuits 30. A first signal output end OUTPUT1 of the first circuit 10 is connected to a second signal input end INPUT2 of each second circuit 20; each second signal output end OUTPUT2 is connected to third signal input ends INPUT3 of the N/M third circuits 30, and different second signal output ends OUTPUT2 are connected to different third signal input ends INPUT3; and different second circuits 20 are connected to different control clock signal ends CLKm, and different third circuits 30 are connected to different output clock signal ends CLKn.
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公开(公告)号：EP4002336A1
公开(公告)日：2022-05-25
申请号：EP20900718.6
申请日：2020-05-27
发明人： ZHAO, Shuang , CHEN, Chenyu , YANG, Zhongliu , CHEN, Wenbo , XU, Zhuo , YANG, Jing , LU, Hongting
IPC分类号： G09G3/20
摘要： An array substrate, a display panel, and a driving method of the array substrate are provided. The array substrate includes: a plurality of pairs of gate lines, each pair of gate lines including a first gate line and a second gate line; a plurality of data lines; and a pixel array, including a plurality of pixel units arranged into a plurality of rows and a plurality of columns. A scan signal terminal of a pixel unit of an nth column in an mth row of pixel units is connected to the first gate line in an mth pair of gate lines to receive a first scan signal; m and n are positive integers; a scan signal terminal of a pixel unit of an (n+1)th column in the mth row of pixel units is connected to the second gate line in the mth pair of gate lines to receive a second scan signal; a reset signal terminal of the pixel unit of the (n+1)th column in the mth row of pixel units is connected to the first gate line in the mth pair of gate lines to receive the first scan signal serving as a first reset signal; data signal terminals of the pixel units of each column are connected to a corresponding data line to receive a data signal.
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