公开(公告)号：EP2686958A4

公开(公告)日：2015-02-18

申请号：EP12761258

申请日：2012-03-16

Applicant: CISCO TECH INC

Inventor： SHASTRI KALPENDU ,  DAMA BIPIN ,  WEBSTER MARK ,  PIEDE DAVID

IPC: G02F1/03 ,  G02F1/225 ,  H03K19/0175 ,  H05K1/02

CPC classification number: H01P3/00 ,  G02F1/011 ,  G02F1/0121 ,  G02F1/0327 ,  G02F1/225 ,  G02F1/2255 ,  G02F2201/124 ,  G02F2201/126 ,  H05K1/0245 ,  H05K2201/09245 ,  H05K2201/09254 ,  H05K2201/10121

Abstract: A configuration for routing electrical signals between a conventional electronic integrated circuit (IC) and an opto-electronic subassembly is formed as an array of signal paths carrying oppositely-signed signals on adjacent paths to lower the inductance associated with the connection between the IC and the opto-electronic subassembly. The array of signal paths can take the form of an array of wirebonds between the IC and the subassembly, an array of conductive traces formed on the opto-electronic subassembly, or both.

公开(公告)号：EP2545401A4

公开(公告)日：2014-03-05

申请号：EP11753780

申请日：2011-02-22

Applicant: CISCO TECH INC

Inventor： WEBSTER MARK ,  PATEL VIPULKUMAR ,  GOTHOSKAR PRAKASH ,  PIEDE DAVID

IPC: G02B6/26 ,  G02B6/12 ,  G02B26/00 ,  G02F1/03

CPC classification number: G02B6/12 ,  G02B6/26 ,  G02B26/00 ,  G02F1/025

Abstract: A high speed silicon-based optical modulator with control of the dopant profiles in the body and gate regions of the device reduces the series resistance of the structure without incurring substantial optical power loss. That is, the use of increased dopant values in areas beyond the active region will allow for the series resistance to be reduced (and thus increase the modulating speed of the device) without incurring too large a penalty in signal loss. The dopant profiles within the gate and body regions are tailored to exhibit an intermediate value between the high dopant concentration in the contact areas and the low dopant concentration in the carrier integration window area.