Method for parallel processing of fuzzy logic inference rules and corresponding circuit architecture with fuzzy inputs and outputs
    3.
    发明公开
    Method for parallel processing of fuzzy logic inference rules and corresponding circuit architecture with fuzzy inputs and outputs 失效
    一种用于处理平行模糊逻辑推理规则和模糊输入和输出匹配电路结构的过程。

    公开(公告)号:EP0684549A1

    公开(公告)日:1995-11-29

    申请号:EP94830240.1

    申请日:1994-05-23

    IPC分类号: G06F7/60

    CPC分类号: G06N7/04 Y10S706/90

    摘要: Method of parallel processing of multiple inference rules (R) organized in fuzzy sets or logical functions of multiple fuzzy sets comprising membership functions (I') defined in a so-called universe of discourse (U) and said inference rules (R) being configured essentially as IF-THEN rules with at least one antecedent preposition and at least one consequent implication and each preposition comprising at least one term (T) of comparison between membership functions (I') and a plurality of input data (I) and each term (T) being separated by logical operators (OL).
    The method comprises at least one phase of calculation of the weight (Ω) of each term (T) of the antecedent part of each fuzzy logic inference rule as the greatest value of the intersection between the set of input data (I) and the corresponding membership functions (I').

    摘要翻译: 在模糊集合或多个模糊集包含在话语中(U)和所述推理规则(R)的一个所谓的宇宙定义隶属函数(I“)的逻辑功能组织的多个推理规则(R)的并行处理方法被配置 基本上如IF-THEN与至少一个先行介词和至少一个随后的含义,并且每个介词包括隶属函数之间的比较中的至少一个术语(T)(I“)和输入数据(I)的多元的,每个术语的规则 (T)通过逻辑运算符(OL)分离。 该方法包括权重的每个术语的每个模糊逻辑推理规则作为置位输入数据(I)之间的交叉点的最大值的前事件部分(T)的(OMEGA)的计算中的至少一个相和对应的 隶属函数(I“)。

    Method for parallel processing of fuzzy logic inference rules and corresponding circuit architecture
    4.
    发明公开
    Method for parallel processing of fuzzy logic inference rules and corresponding circuit architecture 失效
    一种用于模糊逻辑推理规则和匹配电路结构的并行处理方法。

    公开(公告)号:EP0684550A1

    公开(公告)日:1995-11-29

    申请号:EP94830241.9

    申请日:1994-05-23

    IPC分类号: G06F7/60

    CPC分类号: G06N7/04

    摘要: Method of parallel processing of multiple inference rules (R) organised in fuzzy sets or logical functions of multiple fuzzy sets comprising membership functions (I') defined in a so-called universe of discourse (U) and said inference rules (R) being configured essentially as IF-THEN rules with at least one antecedent preposition and at least one consequent implication and each preposition comprising at least one term (T) of comparison between membership functions (I') and a plurality of input data (I) and each term (T) being separated by logical operators (OL).
    The method associates with the logical operators (OL) maximum and minimum operations among two or more elements and calculates exhaustively the overall degree of truth (Ω) of a rule (R) with a maximum or minimum of N partial truth levels (w).

    摘要翻译: 在模糊集合或多个模糊集包含在话语中(U)和所述推理规则(R)的一个所谓的宇宙定义隶属函数(I“)的逻辑功能组织的多个推理规则(R)的并行处理方法被配置 基本上如IF-THEN与至少一个先行介词和至少一个随后的含义,并且每个介词包括隶属函数之间的比较中的至少一个术语(T)(I“)和输入数据(I)的多元的,每个术语的规则 (T)通过逻辑运算符(OL)分离。 一个规则(R)与N-局部真理水平的最大值或最小值(W)的与逻辑运算符(OL)的最大值和两个或多个元件,并且计算详尽之间最小限度的操作的方法相关联的真理(OMEGA)的整体程度。

    Volt level shift method and corresponding circuit
    6.
    发明公开
    Volt level shift method and corresponding circuit 失效
    Spannungspegelverschiebungsverfahren und entsprechende Schaltung

    公开(公告)号:EP0725328A1

    公开(公告)日:1996-08-07

    申请号:EP95830025.3

    申请日:1995-01-31

    IPC分类号: G05F3/24 H03F3/30

    摘要: The present level shift circuit has a first (I1) and a second (I2) input respectively for input of a first and a second voltage signal and an output (OT) and comprises:

    a) a first transistor (Q1) having a control terminal (G1), a first (S1) and a second (D1) main conduction terminal identifying a main conduction path, and
    b) a second transistor (Q2) of the same type as said first transistor (Q1) and having a control terminal (G2), a first (S2) and a second (D2) main conduction terminal identifying a main conduction path.
    The first signal is applied essentially between said control terminal (G1) and said first terminal (S1) of said first transistor (Q1) and said second input (I2) is coupled with the control terminal (G2) of said second transistor (Q2). The currents flowing in the conduction paths of the first (Q1) and the second (Q2) transistors are mutually proportional and one made from the other. The output (OT) is coupled with the first terminal (S2) of the second transistor (Q2). The control terminal (G1) of said first transistor (Q1) is connected to a potential reference (GND). The first signal is applied essentially to said first terminal (S1) of said first transistor (Q1).

    摘要翻译: 当前电平移位电路分别具有用于输入第一和第二电压信号和输出(OT)的第一(I1)和第二(I2)输入,并且包括:a)具有控制端子的第一晶体管(Q1) (G1),识别主导通路径的第一(S1)和第二(D1)主导电端子,以及b)与所述第一晶体管(Q1)相同类型的第二晶体管(Q2),并具有控制端子 G2),识别主导电路径的第一(S2)和第二(D2)主导电端子。 第一信号基本上在所述控制端(G1)和所述第一晶体管(Q1)的所述第一端(S1)之间施加,而所述第二输入(I2)与所述第二晶体管(Q2)的控制端(G2)耦合, 。 在第一(Q1)和第二(Q2)晶体管的导通路径中流动的电流是相互成比例的,另一个是由另一个制成的。 输出(OT)与第二晶体管(Q2)的第一端子(S2)耦合。 所述第一晶体管(Q1)的控制端子(G1)连接到电位基准(GND)。 第一信号基本上应用于所述第一晶体管(Q1)的所述第一端子(S1)。