摘要:
The present invention relates to a parametric scan register. It also relates to a method for testing a digital circuit using such a register. The parametric scan register includes a memory cell (21) having at least one data input (d) capable of receiving test data (e_scan) and transferring to its outlet (s) a signal (62) representative of the input data using a timing signal (h). It further includes a parametric test block (42) having an input connected to the output (s) of the cell (21), the output signal (62) of the cell being transferred to the output (s_reg) of the block (42) through an inner module (61), said inner module operating according to modes capable of modifying the output signal (62) of the cell. The invention is particularly useful for testing integrated circuits having a high integration density, e.g. in the field of nanotechnologies.