REGISTRE SCAN PARAMETRIQUE, CIRCUIT NUMERIQUE ET PROCEDE DE TEST D'UN CIRCUIT NUMERIQUE A L'AIDE D'UN TEL REGISTRE
    1.
    发明公开
    REGISTRE SCAN PARAMETRIQUE, CIRCUIT NUMERIQUE ET PROCEDE DE TEST D'UN CIRCUIT NUMERIQUE A L'AIDE D'UN TEL REGISTRE 有权
    PARA公制扫描寄存器,数字电路和测试一台数字电路的方法使用这种寄存器

    公开(公告)号:EP2069814A1

    公开(公告)日:2009-06-17

    申请号:EP07820965.7

    申请日:2007-10-05

    IPC分类号: G01R31/3185 G01R31/30

    CPC分类号: G01R31/3004 G01R31/318541

    摘要: The present invention relates to a parametric scan register. It also relates to a method for testing a digital circuit using such a register. The parametric scan register includes a memory cell (21) having at least one data input (d) capable of receiving test data (e_scan) and transferring to its outlet (s) a signal (62) representative of the input data using a timing signal (h). It further includes a parametric test block (42) having an input connected to the output (s) of the cell (21), the output signal (62) of the cell being transferred to the output (s_reg) of the block (42) through an inner module (61), said inner module operating according to modes capable of modifying the output signal (62) of the cell. The invention is particularly useful for testing integrated circuits having a high integration density, e.g. in the field of nanotechnologies.