公开(公告)号：EP4508449A1

公开(公告)日：2025-02-19

申请号：EP23712698.2

申请日：2023-03-06

Applicant: Synopsys, Inc.

Inventor： MASSOUDI, Firooz

IPC: G01R31/30 ,  G01R31/317 ,  G01R31/28 ,  G06F30/30

公开(公告)号：EP4430411A1

公开(公告)日：2024-09-18

申请号：EP22912376.5

申请日：2022-12-20

Applicant: Schneider Electric USA, Inc.

Inventor： SHEA, John J.

IPC: G01R31/327 ,  G01R31/333 ,  H02H3/027 ,  H02H3/033 ,  H02H3/04 ,  H02H3/06 ,  H02H3/34 ,  H02H3/36 ,  G01R31/28 ,  G01R31/30 ,  H02H3/26

CPC classification number: H02H1/0015 ,  H02H1/0023 ,  H02H3/087 ,  H02H3/10 ,  H02H3/20 ,  H02H3/202 ,  H02H3/445 ,  G01R31/3272 ,  G01R31/1227 ,  H01H83/20 ,  H01H2083/20120130101

公开(公告)号：EP3671237B1

公开(公告)日：2024-08-28

申请号：EP19217318.5

申请日：2019-12-18

IPC: G01R31/30 ,  H01C13/02 ,  H01G17/00

CPC classification number: G01R31/30 ,  H01G2/02 ,  H01G4/40 ,  H01C1/01

公开(公告)号：EP4328596A3

公开(公告)日：2024-05-22

申请号：EP23220748.0

申请日：2018-11-15

Applicant: Proteantecs Ltd.

Inventor： LANDMAN, Evelyn ,  COHEN, Shai ,  DAVID, Yahel ,  FAYNEH, Eyal ,  WEINTROB, Inbar

IPC: G01R31/3193 ,  G01R31/28 ,  G01R31/30

CPC classification number: G01R31/3016 ,  G01R31/2881 ,  G01R31/3193 ,  G01R31/31937

Abstract: A semiconductor integrated circuit (IC) comprising a signal path combiner, comprising a plurality of input paths and an output path. The IC comprises a delay circuit having an input electrically connected to the output path, the delay circuit delaying an input signal by a variable delay time to output a delayed signal path. The IC may comprise a first storage circuit electrically connected to the output path and a second storage circuit electrically connected to the delayed signal path. The IC comprises a comparison circuit that compares outputs of the signal path combiner and the delayed signal, wherein the comparison circuit comprises a comparison output provided in a comparison data signal to at least one mitigation circuit.

公开(公告)号：EP3724670B1

公开(公告)日：2024-05-01

申请号：EP18836996.1

申请日：2018-12-12

IPC: G05F1/46 ,  G06F1/324 ,  G06F1/3296 ,  G01R31/30

CPC classification number: G01R31/3004 ,  G01R31/3016 ,  G06F1/3296 ,  G05F1/462 ,  G06F1/324 ,  Y02D10/00

公开(公告)号：EP3710844B1

公开(公告)日：2024-02-07

申请号：EP18877539.9

申请日：2018-11-15

Inventor： LANDMAN, Evelyn ,  COHEN, Shai ,  DAVID, Yahel ,  FAYNEH, Eyal ,  WEINTROB, Inbar

IPC: G01R31/3193 ,  G01R31/30 ,  G01R31/28

公开(公告)号：EP3726233B1

公开(公告)日：2023-10-18

申请号：EP20169437.9

申请日：2020-04-14

Inventor： Geerlings, Jurgen

IPC: G01R31/3193 ,  G01R31/28 ,  G01R31/30 ,  G01R31/317

公开(公告)号：EP4220205A1

公开(公告)日：2023-08-02

申请号：EP23153268.0

申请日：2023-01-25

Applicant: NXP USA, Inc.

Inventor： Jarrar, Anis Mahmoud ,  Tipple, David Russell ,  Onyema, Emmanuel Chukwuma

IPC: G01R31/317 ,  G01R31/30

Abstract: Method and integrated circuit for indicating a failure of a critical path. The integrated circuit comprising: 1) a critical data path including a flip flop configured to receive a data input and provide a latched data output; and 2) a monitoring circuit including a delay generator configured to receive the data input and provide a plurality of delayed data outputs corresponding to delayed versions of the data input with increasing amounts of delay, a selector circuit configured to select one of the plurality of delayed outputs based on a programmable control value, a shadow latch coupled to an output of the selector circuit and configured to latch a value at its input to provide as a latched shadow output, a comparator circuit configured to provide a match error indicator based on a comparison between the first latched data output and the latched shadow output, a metastability detection circuit, and an error indicator configured to indicate a failure of the critical data path.

公开(公告)号：EP3588113B1

公开(公告)日：2023-04-12

申请号：EP19181940.8

申请日：2019-06-24

Inventor： Jeong, Jae Woong ,  Winemberg, LeRoy

IPC: G01R31/30 ,  G01R31/3167 ,  G05F3/30 ,  H03M1/46

公开(公告)号：EP4155741A1

公开(公告)日：2023-03-29

申请号：EP22192401.2

申请日：2022-08-26

Applicant: INTEL Corporation

Inventor： RIFANI, Michael ,  IOVINO, Gregory ,  RECHTER, Roman ,  MCFARLAND, Grant ,  KURD, Nasser A. ,  FETZER, Eric ,  HENINGER, Kurt ,  YU, Qinxin ,  RAMASWAMY, Preethi ,  AHMED, Monib ,  GOITIA, Pauline ,  LANKA, Narasimha ,  RASHID, Mohammad ,  WONG, Kit Seong

IPC: G01R31/30 ,  G05F1/46 ,  G01R31/26

Abstract: Examples relate to control apparatus, a control device, a method and a computer program for determining a device-specific supply voltage for a semiconductor device, and to a corresponding semiconductor device and corresponding systems. The control apparatus is configured to obtain measurement data of measurement circuitry of the semiconductor device, the measurement data being related to a progress of aging of the semiconductor device. The control apparatus is configured to determine the device-specific supply voltage of the semiconductor device based on the measurement data. The control apparatus is configured to provide information on the device-specific supply voltage for a supply voltage control apparatus.