公开(公告)号：EP1243024A1

公开(公告)日：2002-09-25

申请号：EP00993755.8

申请日：2000-12-28

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ,  STMicroelectronics S.A.

发明人： DEMOLLIENS, Olivier ,  BERRUYER, Pascale ,  TROUILLER, Yorick ,  MORAND, Yves

IPC分类号： H01L21/768

CPC分类号： H01L21/7682

摘要： The invention concerns a method for making a Damascene type interconnection structure on a semiconductor device, comprising the following steps: forming a first level of conductors in a first layer on electrical insulation and a second level of conductors in a second layer of electrical insulation, the first level conductors being spaced apart to enable, in a subsequent step, the formation of cavities between the first level conductors; eliminating the second electrical insulation level; eliminating at least partially the first electrical insulation layer to eliminate the parts of the first layer corresponding to the cavities to be formed; depositing on the resulting structure a material with low permittivity, said deposit not filling up the space between the first level conductors which have been arranged spaced apart to enable the formation of cavities.

公开(公告)号：EP1177577A1

公开(公告)日：2002-02-06

申请号：EP00912726.7

申请日：2000-03-22

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE

发明人： TROUILLER, Yorick ,  DEMOLLIENS, Olivier

IPC分类号： H01L21/768

CPC分类号： H01L21/76811 ,  H01L21/0332 ,  H01L21/31144 ,  H01L21/76813

摘要： A stage of an integrated circuit (2) comprising connection lines (3) and underlying contact points (4) is produced by disposing masks (8, 9) that are piled on a substrate (1) and respectively hollowed at locations of the contact points and connection lines; successive etchings enable the desired imprints to be made, whereby the conducting material is subsequently deposited therein. Said method dispenses with the removal of resin layers (12) when a large surface area of the substrate (2) is bared, which would otherwise result in a deterioration of low-permittivity material used.

公开(公告)号：EP1243024B1

公开(公告)日：2011-06-08

申请号：EP00993755.8

申请日：2000-12-28

申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives ,  STMicroelectronics S.A.

发明人： DEMOLLIENS, Olivier ,  BERRUYER, Pascale ,  TROUILLER, Yorick ,  MORAND, Yves

IPC分类号： H01L21/768

CPC分类号： H01L21/7682

摘要： The invention concerns a method for making a Damascene type interconnection structure on a semiconductor device, comprising the following steps: forming a first level of conductors in a first layer on electrical insulation and a second level of conductors in a second layer of electrical insulation, the first level conductors being spaced apart to enable, in a subsequent step, the formation of cavities between the first level conductors; eliminating the second electrical insulation level; eliminating at least partially the first electrical insulation layer to eliminate the parts of the first layer corresponding to the cavities to be formed; depositing on the resulting structure a material with low permittivity, said deposit not filling up the space between the first level conductors which have been arranged spaced apart to enable the formation of cavities.