公开(公告)号：EP2351015A1

公开(公告)日：2011-08-03

申请号：EP09775334.7

申请日：2009-11-27

申请人： Casio Computer Co., Ltd.

发明人： OGURA, Jun ,  TAKEI, Manabu ,  KASHIYAMA, Shunji

IPC分类号： G09G3/32

CPC分类号： G09G3/3291 ,  G09G3/3233 ,  G09G2300/0842 ,  G09G2320/0276 ,  G09G2320/043

摘要： A pixel driving device for drive control of pixels, has a image data conversion circuit(123) for generating an original gradation signal by converting an image data, based on a preset conversion property, a signal correction circuit(16) for outputting a corrected gradation signal by adding a correction value acquired based on an electric property parameter of a pixel to the original gradation signal, and a drive signal impressing circuit(118) for impressing a voltage signal corresponding to the corrected gradation signal on one end of a signal line(Ld). The original gradation signal has a value that corresponds to a gradation value of the image data and the maximum value of the original gradation signal is set to a value equal to or smaller than a value acquired by subtracting a value corresponding to the correction value from a maximum value in an input range of the drive signal impressing circuit.

公开(公告)号：EP1509899A2

公开(公告)日：2005-03-02

申请号：EP03736118.5

申请日：2003-06-09

申请人： Casio Computer Co., Ltd.

发明人： YAMADA, Hiroyasu ,  TAKEI, Manabu

IPC分类号： G09G3/32

CPC分类号： G09G3/325 ,  G09G2300/0417 ,  G09G2300/0819 ,  G09G2300/0847 ,  G09G2300/0852 ,  G09G2300/0866 ,  G09G2310/027 ,  G09G2320/0223 ,  G09G2320/043

摘要： A display panel (110) comprises a plurality of optical elements (OEL) each having a pair of electrodes and performing an optical operation according to current passing between the pair of electrodes, a current line (DL), a switch circuit (Tr2) that passes a write current (Ia) with a predetermined current value through the current line (DL) during a selection time (Tse) and stops passing current during a non-selection time (Tnse), and a current storage circuit (Trl, Tr2, Cs, Cp) that stores current data according to the current value of the write current (Ia) passing through the current line (DL) during the selection time (Tse) and that supplies a drive current (Ib) having a current value, which is obtained by subtracting a predetermined offset current (Ioff) from the current value of the stored write current (Ia), to the optical elements (OEL) during the non-selection time (Tnse). The current storage circuit (Trl, Tr2, Cs, Cp) includes a first capacitor device (Cs) to which an electrical charge corresponding to the write current (Ia) is written and a second capacitor device (Cp) to which an electrical charge corresponding to offset current (Ioff) is written, and the second capacitor device (Cp) has a capacitive value, which is equal to or larger than the first capacitor device (Cs).

公开(公告)号：EP1854145A1

公开(公告)日：2007-11-14

申请号：EP06714488.1

申请日：2006-02-17

申请人： CASIO COMPUTER CO., LTD.

发明人： YAMAGUCHI, Ikuhiro ,  TAKEI, Manabu ,  YOSHIDA, Motohiko

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/124

摘要： A thin film transistor panel includes: a transparent substrate (1); scanning lines (2) made of a light blocking electroconductive material to be formed on the transparent substrate (1); data lines (3) formed on the transparent substrate (1) to be perpendicular to the scanning lines (2) and made of a light blocking electroconductive material; thin film transistors (5), each provided with a transparent gate electrode (11) connected to one of the scanning lines (2), a transparent drain electrode (16) connected to one of the data lines (3), a transparent source electrode (15) and a transparent semiconductor thin film (13); and transparent pixel electrodes (4) connected to the thin film transistors (5), wherein each of the pixel electrodes (4) is formed to cover at least a part of the gate electrode (11) of each of the thin film transistors (5).

公开(公告)号：EP1618548A2

公开(公告)日：2006-01-25

申请号：EP04723045.3

申请日：2004-03-24

申请人： CASIO COMPUTER CO., LTD.

发明人： SHIRASAKI, Tomoyuki ,  TAKEI, Manabu

IPC分类号： G09G3/32

CPC分类号： G09G3/325 ,  G09G3/3266 ,  G09G3/3283 ,  G09G3/3648 ,  G09G2300/0417 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2300/0866 ,  G09G2310/0205 ,  G09G2310/0218 ,  G09G2310/027 ,  G09G2310/0297

摘要： The display device of the present invention comprising a a display panel (110) which comprises a plurality of scanning lines (SLia,SLib)arranged in rows and a plurality of data lines (DLja ... DLjd) arranged in columns ; and a plurality of display pixels (EM) arranged in matrix form near the intersecting point of the plurality of scanning lines and the plurality of data lines; a scanning driver circuit (120) which selects simultaneously the display pixels of a plurality of rows connected to some of the plurality of scanning lines of the display panel; and a signal driver circuit (130) which comprises a current generation circuit (CG) which generates signal currents and supplies the display data that provides the display gradation for each of the display pixels and have a current value according to the value of the display data and a plurality of current holding circuits (CH) supplied with the signal currents which take in and hold the signal currents corresponding to the display pixels of the plurality of rows selected by the scanning driver circuit (120) and outputs simultaneously the gradation currents to each of the plurality of display pixels in the plurality of scanning lines based on the signal currents. The display panel comprising a plurality of scanning line groups (SLi) which constitute sets of the plurality of scanning lines through which simultaneous selection is performed by the scanning driver circuit; a plurality of scanning signal lines (SSLi) which are connected to each of the plurality of scanning line groups; and a plurality of data line groups (DLj) which constitute sets of the plurality of data lines corresponding to the line count of the display pixels of the plurality of rows connected to each of the scanning line groups within the plurality of data lines.

公开(公告)号：EP2351014A1

公开(公告)日：2011-08-03

申请号：EP09775332.1

申请日：2009-11-27

申请人： Casio Computer Co., Ltd.

发明人： OGURA, Jun ,  TAKEI, Manabu ,  KASHIYAMA, Shunji

IPC分类号： G09G3/32

CPC分类号： G09G3/3291 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2320/04

摘要： A pixel driving device has a voltage impressing circuit (14) that outputs a reference voltage (Vref) that exceeds a threshold voltage (Vth) of a drive transistor (T3), a voltage measurement circuit (114), and a property parameter acquisition circuit (16) that acquires a property parameter related to an electronic property of a pixel. The pixel driving device impresses the reference voltage on the pixel that has an electroluminescent light emitting element (101) and the drive transistor. The voltage measurement circuit acquires voltage of a signal line (Ld), as measured voltages, after each of a plurality of the settling times elapsing from the time when the reference voltage is cut. The property parameter acquisition circuit acquires, as property parameters, the threshold voltage and a current amplification factor of drive transistor based on values of a plurality of measured voltages acquired by the voltage measurement circuit.

公开(公告)号：EP1504631A1

公开(公告)日：2005-02-09

申请号：EP03723378.0

申请日：2003-05-14

申请人： Casio Computer Co., Ltd.

发明人： TAKEI, Manabu ,  SHIRASAKI, Tomoyuki

IPC分类号： H05B33/10 ,  H05B33/14 ,  H05B33/22 ,  C09K11/06

CPC分类号： H01L51/5275 ,  G02F1/133603 ,  H01L27/3295 ,  H01L51/5225 ,  H01L51/5271 ,  H01L51/5281 ,  H05B33/28

摘要： A luminescent panel includes a transparent substrate, a first transparent electrode provided on the transparent substrate, a luminescent layer provided on the first transparent electrode, and a second transparent electrode provided on the luminescent layer. A reflecting film provided on the second electrode, reflects light emitted from the luminescent layer through the second transparent electrode and causes the reflected light to outwardly emit from the transparent substrate.

摘要翻译： 发光板包括透明基板，设置在透明基板上的第一透明电极，设置在第一透明电极上的发光层以及设置在发光层上的第二透明电极。 设置在第二电极上的反射膜通过第二透明电极反射从发光层发射的光并使反射光从透明基板向外发射。

公开(公告)号：EP1509899B1

公开(公告)日：2016-05-25

申请号：EP03736118.5

申请日：2003-06-09

申请人： CASIO COMPUTER CO., LTD.

发明人： YAMADA, Hiroyasu ,  TAKEI, Manabu

IPC分类号： G09G3/32

CPC分类号： G09G3/325 ,  G09G2300/0417 ,  G09G2300/0819 ,  G09G2300/0847 ,  G09G2300/0852 ,  G09G2300/0866 ,  G09G2310/027 ,  G09G2320/0223 ,  G09G2320/043

公开(公告)号：EP2329486B1

公开(公告)日：2016-01-27

申请号：EP09788088.4

申请日：2009-09-28

申请人： Casio Computer Co., Ltd.

发明人： TAKEI, Manabu ,  OZAKI, Tsuyoshi ,  KASHIYAMA, Shunji

IPC分类号： G09G3/32

CPC分类号： G09G3/3291 ,  G09G2310/0297 ,  G09G2320/0233 ,  G09G2320/0285 ,  G09G2320/0295 ,  G09G2320/043

公开(公告)号：EP2329485B1

公开(公告)日：2016-01-27

申请号：EP09788089.2

申请日：2009-09-28

申请人： Casio Computer Co., Ltd.

发明人： TAKEI, Manabu ,  OGURA, Jun ,  KASHIYAMA, Shunji ,  OZAKI, Tsuyoshi

IPC分类号： G09G3/30 ,  G09G3/32

CPC分类号： G09G3/3233 ,  G09G3/30 ,  G09G3/3291 ,  G09G2300/0842 ,  G09G2300/0866 ,  G09G2320/0233 ,  G09G2320/0285 ,  G09G2320/0295 ,  G09G2320/043

公开(公告)号：EP2329486A1

公开(公告)日：2011-06-08

申请号：EP09788088.4

申请日：2009-09-28

申请人： Casio Computer Co., Ltd.

发明人： TAKEI, Manabu ,  OZAKI, Tsuyoshi ,  KASHIYAMA, Shunji

IPC分类号： G09G3/32

CPC分类号： G09G3/3291 ,  G09G2310/0297 ,  G09G2320/0233 ,  G09G2320/0285 ,  G09G2320/0295 ,  G09G2320/043

摘要： A pixel drive device that drives a pixel array including pixels connected to input/output terminals includes: a connection unit including connection terminals whose number is fewer than a number of the input/output terminals; and a connection switching unit that switches connection between the connection terminals and the input/output terminals. The input/output terminals of the pixel array are divided into a plurality of blocks each including a predetermined number of input/output terminals that is equal to/smaller than the number of connection terminals. The connection switching unit sequentially connects the connection terminals and the input/output terminals of each of the blocks, and sets the connection order of connecting the input/output terminals of each block to the connection terminals, such that adjoining two of the input/output terminals belonging to adjoining two of the blocks are connected to the same one of the connection terminals.