公开(公告)号：EP2577480A1

公开(公告)日：2013-04-10

申请号：EP11726969.6

申请日：2011-05-27

申请人： Cisco Technology, Inc.

发明人： PETERSON, Jay, Evan, Scott ,  MANELA, Philip

IPC分类号： G06F13/16 ,  G06F12/06

CPC分类号： G06F13/1668 ,  G06F12/0623

摘要： In one embodiment, a method includes receiving from a memory controller, a request to access memory stored at memory modules, the request directed to one of a plurality of logical ranks, mapping at a rank aggregator, the logical rank to one of a plurality of physical ranks at the memory modules, and forwarding the request to one of the memory modules according to the mapping. Two or more of the memory modules are combined to represent the number of logical ranks at the memory controller such that there is a one-to-one mapping between the logical ranks and the physical ranks. An apparatus for rank aggregation is also disclosed.

公开(公告)号：EP2245541B1

公开(公告)日：2018-03-21

申请号：EP09701136.5

申请日：2009-01-08

申请人： Cisco Technology, Inc.

发明人： MAZZOLA, Mario ,  NISHTALA, Satyanarayana ,  CAFIERO, Luca ,  MANELA, Philip

IPC分类号： G06F12/00 ,  G06F13/16 ,  G06F13/42

CPC分类号： G06F12/1009 ,  G06F11/1016 ,  G06F12/0207 ,  G06F12/0292 ,  G06F12/0607 ,  G06F13/1684 ,  G06F13/4234

摘要： This document discusses, among other things, an example system and methods for memory expansion. An example embodiment includes receiving a memory request from a memory controller over a channel. Based on the memory request, the example embodiment includes selecting a location in memory to couple to a sub-channel of the channel and configuring the set of field effect transistors to couple the channel with the sub-channel. In the example embodiment, data may be allowed to flow between the memory controller and the location in the memory over the channel and the sub-channel.

公开(公告)号：EP2577480B1

公开(公告)日：2018-11-14

申请号：EP11726969.6

申请日：2011-05-27

申请人： Cisco Technology, Inc.

发明人： PETERSON, Jay Evan Scott ,  MANELA, Philip

IPC分类号： G06F13/16 ,  G06F12/06

CPC分类号： G06F13/1668 ,  G06F12/0623

摘要： In one embodiment, a method includes receiving from a memory controller, a request to access memory stored at memory modules, the request directed to one of a plurality of logical ranks, mapping at a rank aggregator, the logical rank to one of a plurality of physical ranks at the memory modules, and forwarding the request to one of the memory modules according to the mapping. Two or more of the memory modules are combined to represent the number of logical ranks at the memory controller such that there is a one-to-one mapping between the logical ranks and the physical ranks. An apparatus for rank aggregation is also disclosed.

公开(公告)号：EP2245541A2

公开(公告)日：2010-11-03

申请号：EP09701136.5

申请日：2009-01-08

申请人： Cisco Technology, Inc.

发明人： MAZZOLA, Mario ,  NISHTALA, Satyanarayana ,  CAFIERO, Luca ,  MANELA, Philip

IPC分类号： G06F12/00 ,  G06F13/16

CPC分类号： G06F12/1009 ,  G06F11/1016 ,  G06F12/0207 ,  G06F12/0292 ,  G06F12/0607 ,  G06F13/1684 ,  G06F13/4234

摘要： This document discusses, among other things, an example systems and methods for memory expansion. An example embodiment includes receiving a memory request from a memory controller over a channel. Based on the memory request, the example embodiment includes selecting a location in memory to couple to a sub-channel of the channel and configuring the set of field effect transistors to couple the channel with the sub-channel. In the example embodiment, data may be allowed to flow between the memory controller and the location in the memory over the channel and the sub-channel.