利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

13 条记录 (耗时 0.024 秒)

    PROCEDE DE FABRICATION D'UNE ECRAN A TRES HAUTE RESOLUTION UTILISANT UN FILM CONDUCTEUR EMISSIF ANISOTROPIQUE A BASE DE NANOFILS
    2.
    发明公开
    PROCEDE DE FABRICATION D'UNE ECRAN A TRES HAUTE RESOLUTION UTILISANT UN FILM CONDUCTEUR EMISSIF ANISOTROPIQUE A BASE DE NANOFILS 有权
    PROCESS用梯子各向异性发光层上的发光二极管的纳米线和相应的屏幕基材非常高的分辨率的屏幕

    公开(公告)号：EP2491591A1

    公开(公告)日：2012-08-29

    申请号：EP10785136.2

    申请日：2010-10-19

    申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives

    发明人： TEMPLIER, François ,  CLAVELIER, Laurent ,  RABAROT, Marc

    IPC分类号： H01L27/15

    CPC分类号： H01L27/156 ,  B82Y20/00 ,  H01L33/0079 ,  H01L33/08 ,  H01L33/18 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The invention relates to a method for producing an emitting pixel screen, which includes forming an active pixel matrix (1), along which a first electrode-forming layer (2) runs, said pixels being arranged according to a predetermined distribution; forming an anisotropic substrate (3) made up of a set of light-emitting diodes, each of which is made up of parallel nanowires (4) distributed in an insulating matrix (5) transversely to the body thereof, i.e. vertically, at a higher density than the pixels, regardless of the predetermined distribution of the pixels; connecting the substrate to the active pixel matrix, such that only sub-groups (4A, 4B) of said nanowires are connected, by means of a first end, to separate pixel electrodes (2A, 2B) defined in the electrode-forming layer according to the distribution of the pixels in the active pixel matrix, while at least said sub-groups of nanowires are electrically connected, by means of another end, to a common electrode (6), said sub-groups being defined during said connection step by rendering the nanowires of the substrate which are arranged between said sub-groups emissively inactive.

    PROCÉDÉ D'AJUSTEMENT DE LA TENSION DE SEUIL D'UN TRANSISTOR PAR UNE COUCHE DE PIÉGEAGE ENTERRÉE
    3.
    发明公开
    PROCÉDÉ D'AJUSTEMENT DE LA TENSION DE SEUIL D'UN TRANSISTOR PAR UNE COUCHE DE PIÉGEAGE ENTERRÉE 审中-公开
    方法，通过埋FALL层调整电压晶体管的阈值

    公开(公告)号：EP2248180A1

    公开(公告)日：2010-11-10

    申请号：EP09711545.5

    申请日：2009-02-11

    申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives

    发明人： ANDRIEU, François ,  AUGENDRE, Emmanuel ,  CLAVELIER, Laurent ,  KOSTRZEWA, Marek

    IPC分类号： H01L29/786 ,  H01L29/792

    CPC分类号： H01L29/42348 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/792

    摘要： The method comprises, for the production of an electronic subassembly: an assembly step, in which a semiconductor layer (103) bearing at least a first transistor (110) having an adjustable threshold voltage, is joined to an insulator layer (102, 105); and a formation step, in which a first trapping zone (220) is formed in the insulating layer at a predetermined first depth, said first trapping zone extending at least beneath a channel of said first transistor and having traps of greater density than the density of traps outside said first trapping zone, in such a way that the semiconductor layer and the first trapping zone are capacitively coupled, the useful information from said first transistor being the charge transport within this transistor. In certain embodiments, a second trapping zone extending at least beneath a channel of a second transistor is formed by a second implantation with an energy and/or a dose and/or atoms that differ from those used for the first trapping zone.

    DISPOSITIF A ONDES ACOUSTIQUES COMPRENANT UN FILTRE A ONDES DE SURFACE ET UN FILTRE A ONDES DE VOLUME ET PROCEDE DE FABRICATION
    7.
    发明公开
    DISPOSITIF A ONDES ACOUSTIQUES COMPRENANT UN FILTRE A ONDES DE SURFACE ET UN FILTRE A ONDES DE VOLUME ET PROCEDE DE FABRICATION 有权
    具有产生表面波滤波器和音量滤波器和过程SCHALLWELLENVORRICHTUG

    公开(公告)号：EP2486655A1

    公开(公告)日：2012-08-15

    申请号：EP10760693.1

    申请日：2010-10-04

    申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives

    发明人： DEGUET, Chrystel ,  CLAVELIER, Laurent ,  DEFAY, Emmanuel ,  REINHARDT, Alexandre

    IPC分类号： H03H3/02 ,  H03H3/08

    CPC分类号： H03H3/08 ,  H03H3/02 ,  H03H2003/0071 ,  Y10T29/42

    摘要： The invention relates to an acoustic wave device comprising at least one surface acoustic wave (SAW) filter and one bulk acoustic wave (BAW) filter, characterized in that it includes, on a substrate comprising a second piezoelectric material (P
    iézo2 ): a stack of layers comprising at least a first metal layer (M
    1 ) and a layer of a first monocrystalline piezoelectric material (P
    iézo1 ), wherein the stack of layers is partially etched so as to define a first area in which the first and second piezoelectric materials are present and a second area in which the first piezoelectric material is absent; a second metallization (M
    2 ) at the first area for defining the bulk acoustic wave filter integrating the first piezoelectric material, and a third metallization (M
    3 ) at the second area for defining the surface acoustic wave filter integrating the second piezoelectric material. The invention also relates to a method for making the device of the invention, advantageously using application steps similar to those used is the Smart Cut
    TM method or mechanical bonding/thinning steps.

    PROCEDE D'ELABORATION D'UN SUBSTRAT HYBRIDE AYANT UNE COUCHE CONTINUE ELECTRIQUEMENT ISOLANTE ENTERREE
    8.
    发明公开
    PROCEDE D'ELABORATION D'UN SUBSTRAT HYBRIDE AYANT UNE COUCHE CONTINUE ELECTRIQUEMENT ISOLANTE ENTERREE 有权
    工艺生产具有嵌入式电绝缘层持续混合衬底

    公开(公告)号：EP2342745A1

    公开(公告)日：2011-07-13

    申请号：EP09760239.5

    申请日：2009-10-29

    申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives

    发明人： SIGNAMARCHEIX, Thomas ,  FOURNEL, Franck ,  CLAVELIER, Laurent ,  DEGUET, Chrystel

    IPC分类号： H01L21/762 ,  H01L21/84

    CPC分类号： H01L21/76254

    摘要： The invention relates to a method for producing a hybrid substrate comprising the following steps: - a first substrate (10) is prepared, comprising a mixed layer extended by an underlying electrically insulating continuous layer (11) and made up of first single-crystal areas (12A) and second adjacent areas (12B) in an amorphous material, said second areas making up at least part of the free surface of said first substrate; a second substrate (20) that comprises, on the surface thereof, a reference layer with a predetermined crystallographic orientation, is bonded to said first substrate by hydrophobic molecular bonding at least onto said amorphous areas; recrystallisation of at least part of the amorphous areas to solid phase is carried out according to the crystallographic orientation of the reference layer, and the two substrates are separated at the bonding interface.