公开(公告)号：EP3839717A1

公开(公告)日：2021-06-23

申请号：EP20211498.9

申请日：2020-12-03

申请人： Facebook, Inc.

发明人： WU, Olivia ,  DIRIL, Abdulkadir Utku ,  NAIR, Krishnakumar Narayanan ,  KALAIAH, Aravind ,  KADKOL, Anup Ramesh ,  KANSAL, Pankaj

IPC分类号： G06F3/06 ,  G06F12/02 ,  G06F13/16 ,  G06F13/40 ,  G06F12/06

摘要： A system comprises a processor coupled to a plurality of memory units. Each of the plurality of memory units includes a request processing unit and a plurality of memory banks. Each request processing unit includes a plurality of decomposition units and a crossbar switch, the crossbar switch communicatively connecting each of the plurality of decomposition units to each of the plurality of memory banks. The processor includes a plurality of processing elements and a communication network communicatively connecting the plurality of processing elements to the plurality of memory units. At least a first processing element of the plurality of processing elements includes a control logic unit and a matrix compute engine. The control logic unit is configured to access the plurality of memory units using a dynamically programmable distribution scheme.

公开(公告)号：EP3835966A1

公开(公告)日：2021-06-16

申请号：EP20211459.1

申请日：2020-12-03

申请人： Facebook, Inc.

发明人： DIRIL, Abdulkadir Utku ,  WU, Olivia ,  NAIR, Krishnakumar Narayanan ,  KALAIAH, Aravind ,  KADKOL, Anup Ramesh ,  KANSAL, Pankaj

IPC分类号： G06F15/163 ,  G06F15/173

摘要： A system comprises a processor and a plurality of memory units. The processor is coupled to each of the plurality of memory units by a plurality of network connections. The processor includes a plurality of processing elements arranged in a two-dimensional array and a corresponding two-dimensional communication network communicatively connecting each of the plurality of processing elements to other processing elements on same axes of the two-dimensional array. Each processing element that is located along a diagonal of the two-dimensional array is configured as a request broadcasting master for a respective group of processing elements located along a same axis of the two-dimensional array.

公开(公告)号：EP3832470A1

公开(公告)日：2021-06-09

申请号：EP20205410.2

申请日：2020-11-03

申请人： Facebook, Inc.

发明人： KANSAL, Pankaj ,  DIRIL, Abdulkadir ,  WU, Olivia ,  NAIR, Krishnakumar ,  KADKOL, Anup ,  KALAIAH, Aravind

IPC分类号： G06F12/06 ,  G06F15/173 ,  G06F13/16

摘要： A system comprises a processor coupled to a plurality of memory units. Each of the plurality of memory units includes a request processing unit and a plurality of memory banks. The processor includes a plurality of processing elements and a communication network communicatively connecting the plurality of processing elements to the plurality of memory units. At least a first processing element of the plurality of processing elements includes a control logic unit and a matrix compute engine. The control logic unit is configured to access data from the plurality of memory units using a dynamically programmable distribution scheme.