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公开(公告)号：EP0241854B1
公开(公告)日：1993-07-21
申请号：EP87105218.9
申请日：1987-04-08
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公开(公告)号：EP0241854A3
公开(公告)日：1989-11-23
申请号：EP87105218.9
申请日：1987-04-08
发明人： Katsumata, Kenji , Sugiyama, Masato , Okuda, Akihide , Hirahata, Shigeru , Nakagawa, Isao , Suzuki, Sunao
摘要： A video signal processing circuit of motion adaptive type includes a circuit for identifying motion of a picture in a video signal on the basis of a difference signal between at least a line signal appearing in an M-th field and a corresponding line signal appearing in an (M-1)th field so that, when a scanning line produced on the basis of the video signal is interpolated between scanning lines of the video signal to improve the picture quality, a signal for interpolating said scanning line is produced in a different manner depending on whether a portion of the video signal to the displayed is a still picture or a moving picture. The motion identifying circuit comprises a horizontal filter (15, 16) spreading the difference signal in the horizontal direction, a circuit (17,18) delaying the output signal of the horizontal filter by one field after attenuation, a line memory (19) delaying the output signal of the attenuating and delaying circuit (17, 18) by one line, and an output circuit (20) generating a signal identifying the motion of the picture on the basis of the output signals of the horizontal filter (15), attenuating and delaying circuit (17,18) and line memory (19).
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3.发明公开Video signal processing circuit of motion adaptive type 失效Schaltung zur Verarbeitung eines Videosignals mit Bewegungsadaptation。
公开(公告)号：EP0241854A2
公开(公告)日：1987-10-21
申请号：EP87105218.9
申请日：1987-04-08
发明人： Katsumata, Kenji , Sugiyama, Masato , Okuda, Akihide , Hirahata, Shigeru , Nakagawa, Isao , Suzuki, Sunao
摘要： A video signal processing circuit of motion adaptive type includes a circuit for identifying motion of a picture in a video signal on the basis of a difference signal between at least a line signal appearing in an M-th field and a corresponding line signal appearing in an (M-1)th field so that, when a scanning line produced on the basis of the video signal is interpolated between scanning lines of the video signal to improve the picture quality, a signal for interpolating said scanning line is produced in a different manner depending on whether a portion of the video signal to the displayed is a still picture or a moving picture. The motion identifying circuit comprises a horizontal filter (15, 16) spreading the difference signal in the horizontal direction, a circuit (17,18) delaying the output signal of the horizontal filter by one field after attenuation, a line memory (19) delaying the output signal of the attenuating and delaying circuit (17, 18) by one line, and an output circuit (20) generating a signal identifying the motion of the picture on the basis of the output signals of the horizontal filter (15), attenuating and delaying circuit (17,18) and line memory (19).
摘要翻译： 运动自适应类型的视频信号处理电路包括用于基于出现在第M场中的至少一条线信号和出现在第M场中的相应线信号之间的差信号识别视频信号中的图像的运动的电路 （M-1）场，使得当基于视频信号产生的扫描线被内插在视频信号的扫描线之间以提高图像质量时，以不同的方式产生用于内插所述扫描线的信号 取决于所显示的视频信号的一部分是静止图像还是运动图像。 运动识别电路包括水平滤波器（15,16），用于在水平方向上扩展差分信号，在衰减后将水平滤波器的输出信号延迟一个场的电路（17,18），将存储器（19）延迟 衰减和延迟电路（17,18）的输出信号一行;以及输出电路（20），其基于水平滤波器（15）的输出信号产生识别图像的运动的信号，衰减和 延迟电路（17,18）和行存储器（19）。
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公开(公告)号：EP0049997A3
公开(公告)日：1982-10-20
申请号：EP81304633
申请日：1981-10-06
申请人： Hitachi, Ltd.
发明人： Nakagawa, Isao , Kondo, Kazuo , Kudo, Mitsuru
CPC分类号： H03H11/04
摘要： A time-constant circuit (13) suitable for being fabricated into an integrated circuit comprising a resistive element (10) with its one end connected to a first input terminal (4), an impedance converting circuit (3) with its input connected to another end of said resistive element (10) and its output connected to an output terminal (5), a variable gain differential amplifier (7) with its one input connected to the output of said impedance converting circuit (3) and its another input connected to a second input terminal (6), an adder circuit (8) for adding an output from said amplifier and an input signal appearing on said second input terminal (6), and a capacitive element (9) connected between the junction of said resistive element (10) and said impedance converting circuit (3) and the output of said adder circuit (8). A plurality of the time-constant circuits (13, 14) are combined to construct a filter circuit. The gain of the variable gain differential amplifier (7, 7') in each time-constant circuit (13, 14) is controlled by a common DC voltage, whereby the spread of characteristic values of the integrated circuit elements can be compensated.
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5.发明授权Dual port video memory system having semi-synchronous data input and data output 失效视频双端口存储器系统的半同步数据输入和数据输出。
公开(公告)号：EP0276870B1
公开(公告)日：1994-05-04
申请号：EP88101322.1
申请日：1988-01-29
IPC分类号： G11C8/00
CPC分类号： G11C7/22 , G11C7/1075 , G11C8/16
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6.发明公开Dual port video memory system having semi-synchronous data input and data output 失效具有同步数据输入和数据输出的双端口视频存储系统
公开(公告)号：EP0276870A3
公开(公告)日：1989-12-27
申请号：EP88101322.1
申请日：1988-01-29
IPC分类号： G11C8/00
CPC分类号： G11C7/22 , G11C7/1075 , G11C8/16
摘要： A dual port video memory system includes a serial-to-parallel converter (38A-38E) coupled to the input data port and a parallel-to-serial converter (54A-54D) coupled to the output data port. Four-bit pixel values are clocked into the serial-to-parallel converter synchronous with an input clock signal (WCK) and are provided by the parallel-to-serial converter synchronous with an output clock signal (RCK). The input and output clock signals may have different frequencies, but the negative-going edges of each of these clock signals are synchronized to the negative-going edges of a master clock signal (CLK).
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公开(公告)号：EP0091102B1
公开(公告)日：1987-03-11
申请号：EP83103229.7
申请日：1983-03-31
申请人： Hitachi, Ltd.
IPC分类号： H04N9/80
CPC分类号： H04N9/84 , H04N9/7925 , H04N9/898
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公开(公告)号：EP0049997B1
公开(公告)日：1985-01-30
申请号：EP81304633.1
申请日：1981-10-06
申请人： Hitachi, Ltd.
发明人： Nakagawa, Isao , Kondo, Kazuo , Kudo, Mitsuru
CPC分类号： H03H11/04
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公开(公告)号：EP0091102A1
公开(公告)日：1983-10-12
申请号：EP83103229.7
申请日：1983-03-31
申请人： Hitachi, Ltd.
IPC分类号： H04N9/80
CPC分类号： H04N9/84 , H04N9/7925 , H04N9/898
摘要： A color signal processing circuit in a video tape recorder for recording a low frequency converted color signal comprises a voltage controlled oscillator (10) for generating a carrier having a center frequency which is M times as high as a low-frequency sub-carrier frequency, where M is an integer, detection means (16) for detecting a variation of the wscillation frequency of the voltage controlled oscillator in at least a reproduction mode. suppression means (27, 29 - 31) for suppressing the change of the oscillation frequency of the coltage controlled oscillator by the output signal from the detection means and counter means (28) for changing the center oscillation frequency of the voltage controlled oscillator depending on whether the signal is processed in the NTSC system or the CCIR system such for the suppression range for the change of the oscillation frequency of the voltage controlled oscillator by the suppression means for the NTSC system is equal to or wider than that for the CCIR system. The counter means includes a pulse-eliminating frequency divider of a variable frequency division factor.
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公开(公告)号：EP0049997A2
公开(公告)日：1982-04-21
申请号：EP81304633.1
申请日：1981-10-06
申请人： Hitachi, Ltd.
发明人： Nakagawa, Isao , Kondo, Kazuo , Kudo, Mitsuru
CPC分类号： H03H11/04
摘要： A time-constant circuit (13) suitable for being fabricated into an integrated circuit comprising a resistive element (10) with its one end connected to a first input terminal (4), an impedance converting circuit (3) with its input connected to another end of said resistive element (10) and its output connected to an output terminal (5), a variable gain differential amplifier (7) with its one input connected to the output of said impedance converting circuit (3) and its another input connected to a second input terminal (6), an adder circuit (8) for adding an output from said amplifier and an input signal appearing on said second input terminal (6), and a capacitive element (9) connected between the junction of said resistive element (10) and said impedance converting circuit (3) and the output of said adder circuit (8). A plurality of the time-constant circuits (13, 14) are combined to construct a filter circuit. The gain of the variable gain differential amplifier (7, 7') in each time-constant circuit (13, 14) is controlled by a common DC voltage, whereby the spread of characteristic values of the integrated circuit elements can be compensated.
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