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公开(公告)号：EP2573636A2
公开(公告)日：2013-03-27
申请号：EP12183922.9
申请日：2012-09-11
发明人： Kamenetz, Jeffry K. , Johnston, Mark A. , Marotta, Edward John , Bleier, Cathleen R. , O'Neil, John M.
IPC分类号： G05B23/02 , G05B19/042
CPC分类号： G05B19/0421 , G05B19/0428 , G05B2219/14014 , G05B2219/24177 , G05B2219/24183 , G05B2219/24186 , G06F11/2033 , G06F11/2041
摘要： A multi-channel control system includes at least a first primary control microprocessor and a second primary control microprocessor operable to control a device, and at least a first secondary control microprocessor and a second secondary control microprocessor operable to control the device. Each of the first and second primary control microprocessors and the first a second secondary control microprocessors are arranged as an independent control channel.
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公开(公告)号：EP2573629A1
公开(公告)日：2013-03-27
申请号：EP12184056.5
申请日：2012-09-12
CPC分类号： G05B9/03 , F01D21/02 , F02C9/46 , F02D41/22 , F02D41/266 , F02D41/28 , F02D2200/101 , F02D2400/08 , F05D2270/021
摘要： A multi-channel controller uses multiple logic gates and multiple control channels to provide fault tolerant protection against undesired events.
摘要翻译： 多通道控制器使用多个逻辑门和多个控制通道来提供针对不期望事件的容错保护。
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公开(公告)号：EP2801874A1
公开(公告)日：2014-11-12
申请号：EP14165781.7
申请日：2014-04-24
发明人： Kamenetz, Jeffry K. , Gosse, James A. , Gostkowski, Joseph T. , Bue, Richard L. , Johnston, Mark A. , Wivell, James Peter
IPC分类号： G05B19/042 , G06F11/16
CPC分类号： G05B15/02 , G05B9/03 , G05B19/0421 , G05B2219/14014 , G06F11/16 , G06F11/202
摘要： A multi-channel control system includes at least a primary control microprocessor and a back-up control microprocessor operable to control a device. The primary control microprocessor and the back-up control microprocessor assert control over a controlled device according to a locally stored method of controlling a back-up microprocessor assumption of control of a device.
摘要翻译： 多通道控制系统至少包括主控微处理器和可操作以控制设备的备用控制微处理器。 主控制微处理器和备用控制微处理器根据本地存储的方法来控制受控设备，该方法控制备份微处理器对设备的控制的假设。
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公开(公告)号：EP2801874B1
公开(公告)日：2017-06-21
申请号：EP14165781.7
申请日：2014-04-24
发明人： Kamenetz, Jeffry K. , Gosse, James A. , Gostkowski, Joseph T. , Bue, Richard L. , Johnston, Mark A. , Wivell, James Peter
IPC分类号： G05B19/042 , G06F11/16
CPC分类号： G05B15/02 , G05B9/03 , G05B19/0421 , G05B2219/14014 , G06F11/16 , G06F11/202
摘要： A multi-channel control system includes at least a primary control microprocessor and a back-up control microprocessor operable to control a device. The primary control microprocessor and the back-up control microprocessor assert control over a controlled device according to a locally stored method of controlling a back-up microprocessor assumption of control of a device.
摘要翻译： 多通道控制系统包括至少一个主控微处理器和一个可操作来控制设备的备用控制微处理器。 主控微处理器和备用控制微处理器根据本地存储的控制设备控制的备用微处理器假设方法来对受控设备进行控制。
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5.发明公开
公开(公告)号：EP2573636A3
公开(公告)日：2016-04-20
申请号：EP12183922.9
申请日：2012-09-11
发明人： Kamenetz, Jeffry K. , Johnston, Mark A. , Marotta, Edward John , Bleier, Cathleen R. , O'Neil, John M.
IPC分类号： G05B19/042 , G05B9/03 , G06F11/16
CPC分类号： G05B19/0421 , G05B19/0428 , G05B2219/14014 , G05B2219/24177 , G05B2219/24183 , G05B2219/24186 , G06F11/2033 , G06F11/2041
摘要： A multi-channel control system includes at least a first primary control microprocessor and a second primary control microprocessor operable to control a device, and at least a first secondary control microprocessor and a second secondary control microprocessor operable to control the device. Each of the first and second primary control microprocessors and the first a second secondary control microprocessors are arranged as an independent control channel.
摘要翻译： 多通道控制系统至少包括可操作以控制设备的第一主控微处理器和第二主控微处理器，以及可操作以控制设备的至少第一副控微处理器和第二副控微处理器。 第一和第二主控制微处理器和第一和第二辅助控制微处理器中的每一个被布置为独立的控制通道。
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公开(公告)号：EP2495659B1
公开(公告)日：2013-05-29
申请号：EP12169884.9
申请日：2010-10-11
发明人： Kamenetz, Jeffry K. , DiVincenzo, Gregory , Johnston, Mark A. , Kokas, Jay W. , Orsini, Luke T. , Fischer, Steven R , Hartman, Jay H. , Roy, Kevin P. , Betterini, William
CPC分类号： G06F11/0796 , G05B19/0428 , G05B2219/25471 , G06F11/2028
摘要： An electronic control configuration (10a) includes at least one secondary microprocessor (32a, 32b) operable to control a device (12). The at least one secondary microprocessor (32a, 32b) assumes protection control of the device responsive to a first type of failure by transmitting a protection control signal to a first effector (18). The at least one secondary microprocessor (32a, 32b) assumes backup control of the device responsive to a second type of failure by transmitting a backup control signal to a second effector (16). The backup control functionality of the at least one secondary microprocessor (32a, 32b) can be selectively disabled.
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7.发明公开Architecture using integrated backup control and protection hardware 有权Architektur mit integrierter Sicherungssteuerung und Schutzhardware
公开(公告)号：EP2495659A1
公开(公告)日：2012-09-05
申请号：EP12169884.9
申请日：2010-10-11
发明人： Kamenetz, Jeffry K. , DiVincenzo, Gregory , Johnston, Mark A. , Kokas, Jay W. , Orsini, Luke T. , Fischer, Steven R , Hartman, Jay H. , Roy, Kevin P. , Betterini, William
CPC分类号： G06F11/0796 , G05B19/0428 , G05B2219/25471 , G06F11/2028
摘要： An electronic control configuration (10a) includes at least one secondary microprocessor (32a, 32b) operable to control a device (12). The at least one secondary microprocessor (32a, 32b) assumes protection control of the device responsive to a first type of failure by transmitting a protection control signal to a first effector (18). The at least one secondary microprocessor (32a, 32b) assumes backup control of the device responsive to a second type of failure by transmitting a backup control signal to a second effector (16). The backup control functionality of the at least one secondary microprocessor (32a, 32b) can be selectively disabled.
摘要翻译： 电子控制配置（10a）包括可操作以控制设备（12）的至少一个二次微处理器（32a，32b）。 所述至少一个次级微处理器（32a，32b）通过将保护控制信号发送到第一执行器（18）而对第一类型的故障作出对该装置的保护控制。 所述至少一个次级微处理器（32a，32b）通过将备用控制信号发送到第二执行器（16）来对所述设备进行备用控制以响应第二类型的故障。 可以选择性地禁用至少一个次级微处理器（32a，32b）的备用控制功能。
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